From: Brian Masney <bmasney@redhat.com>
To: Alex Elder <elder@riscstar.com>
Cc: sboyd@kernel.org, bmasney+clk@redhat.com,
jbrunet+clk@baylibre.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, lee@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, abelvesa@kernel.org, kees@kernel.org,
gustavoars@kernel.org, p.zabel@pengutronix.de,
daniel@riscstar.com, mohd.anwar@oss.qualcomm.com,
lorenzo.bianconi@oss.qualcomm.com, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, mfd@lists.linux.dev,
linux-arm-msm@vger.kernel.org, linux-hardening@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/4] clk: toshiba: introduce a TC9564 SoC clock and reset driver
Date: Thu, 24 Sep 2026 15:22:57 -0400 [thread overview]
Message-ID: <arV4kYRFHM0rW8Km@redhat.com> (raw)
In-Reply-To: <0785235b-de06-44d4-9068-ec706eeba848@riscstar.com>
Hi Alex,
On Tue, Sep 22, 2026 at 08:33:37AM -0500, Alex Elder wrote:
> On 9/21/26 5:59 PM, Brian Masney wrote:
> > On Fri, Sep 18, 2026 at 11:52:32AM -0500, Alex Elder wrote:
> > > Define a new platform driver that manages clock and reset signals
> > > within the TC9564 SoC. There are 21 clocks, which can only be
> > > enabled and disabled, as well as 13 reset signals.
> > >
> > > Two registers manage the state of the clocks and two others manage
> > > the state of the resets. The registers are accessed via a regmap
> > > supplied by a system controller, which coordinates access to a
> > > region of memory that will be shared with another driver.
> > >
> > > Access to the memory region is provided via a BAR on a PCIe endpoint
> > > function embedded in the TC9564 SoC. For that reason, neither the
> > > PCIe clock nor PCIe reset can be manipulated by this driver (they
> > > are assumed always on and deasserted, respectively).
> > >
> > > Similarly, control is not available for the I2C clock and reset,
> > > because the PCIe subsystem on the TC9564 relies on I2C
> > >
> > > Co-developed-by: Daniel Thompson <daniel@riscstar.com>
> > > Signed-off-by: Daniel Thompson <daniel@riscstar.com>
> > > Signed-off-by: Alex Elder <elder@riscstar.com>
> > > ---
> > > MAINTAINERS | 1 +
> > > drivers/clk/Kconfig | 11 ++
> > > drivers/clk/Makefile | 1 +
> > > drivers/clk/clk-tc9564.c | 366 +++++++++++++++++++++++++++++++++++++++
> > > 4 files changed, 379 insertions(+)
> > > create mode 100644 drivers/clk/clk-tc9564.c
> > >
> > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > index 66d0e7e65adcb..39346a5cd9a7f 100644
> > > --- a/MAINTAINERS
> > > +++ b/MAINTAINERS
> > > @@ -27675,6 +27675,7 @@ M: Alex Elder <elder@kernel.org>
> > > M: Daniel Thompson <danielt@kernel.org>
> > > S: Maintained
> > > F: Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml
> > > +F: drivers/clk/clk-tc9564.c
> > > F: include/dt-bindings/clock/toshiba,tc9564.h
> > > TOSHIBA TC9564 PCI DRIVER
> > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> > > index f9592fd9ec2bb..50efa10d48450 100644
> > > --- a/drivers/clk/Kconfig
> > > +++ b/drivers/clk/Kconfig
> > > @@ -292,6 +292,17 @@ config COMMON_CLK_S2MPS11
> > > clock. These multi-function devices have two (S2MPS14) or three
> > > (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
> > > +config COMMON_CLK_TC9564
> > > + tristate "Toshiba TC9564 clock support"
> > > + depends on TC9564_PCI
> >
> > select RESET_CONTROLLER
>
> Thank you. The reset and clock drivers were previously separate
> and the reset only became available if RESET_CONTROLLER was enabled.
> Combining them means I need this. I will add it.
>
> I also need to select MFD_SYSCON to get syscon_node_to_regmap()
> (or perhaps something similar, depending on the answers to my
> questions about the proper way to define the syscon).
> >
> > > + default m
> >
> > default n
>
> This depends on TC9564_PCI, and if TC9564_PCI is enabled I would
> like this to (automatically) be available (at least as a module).
>
> Why do you recommend "n"?
There is no existing 'default m' or 'default y' in the toplevel clk Kconfig.
How about this instead?
depends on TC9564_PCI || COMPILE_TEST
default TC9564_PCI
> > > + help
> > > + This enables support for the clock and reset controller embedded
> > > + in the Toshiba TC9564 (and Qualcomm QPS615) SoC. The state of
> > > + clock and reset lines is controlled by MMIO to a region managed
> > > + by a system controller; this ensures access to the region is
> > > + coordinated between this and other drivers.
> >
> > Rather than 'other drivers', outline specifically which other drivers.
>
> I was intentionally vague at this point because the one other driver
> has not yet gone out for upstream review for this iteration of the
> code. But I do agree with you, so I'll change this to say:
>
> ... between this and the XGMAC (stmmac) driver.
>
> Then it will be correct without modification once that driver goes
> out for review. Is that better, or do you suggest something else?
Yes that sounds good.
> > > +static const struct tc9564_clock_init tc9564_clock_init[] = {
> > > + TC9564_CLOCK_INIT0(MCU, 0),
> > > + TC9564_CLOCK_INIT0(INTC, 4),
> > > + /* TC9564_CLOCK_INIT0(PCIE, 9), */
> > > + /* TC9564_CLOCK_INIT0(I2C, 12), */
> >
> > A comment would be useful here to outline why these are commented out.
> > Is the PCIE one comment out because of what's outlined in the commit
> > message?
>
> Yes, that is why. We are downstream of PCIe, and PCIe in this
> case depends on I2C. So we don't want to mess with these two
> clocks or their reset counterparts.
>
> I only provide this for the benefit of documentation. If someone
> happens to see bit 9 set in this register, it means the PCIe clock
> is enabled.
>
> Anyway, others have suggested simply removing these comments.
> So I'll do what you suggest, but I'm interested to know whether
> you would favor just deleting them instead.
I also think to delete these comments. Would it make sense to include
the comment in just include/dt-bindings/clock/toshiba,tc9564.h ?
Brian
next prev parent reply other threads:[~2026-09-24 19:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-18 16:52 [PATCH 0/4] clk: introduce TC9564 clock and reset Alex Elder
2026-09-18 16:52 ` [PATCH 1/4] dt-bindings: mfd: introduce the TC9564 config syscon Alex Elder
2026-09-20 18:18 ` Krzysztof Kozlowski
2026-09-21 21:46 ` Alex Elder
2026-09-22 21:02 ` Alex Elder
2026-09-23 7:25 ` Krzysztof Kozlowski
2026-09-18 16:52 ` [PATCH 2/4] dt-bindings: clock: introduce toshiba,tc9564-clock.yaml Alex Elder
2026-09-20 18:21 ` Krzysztof Kozlowski
2026-09-21 21:46 ` Alex Elder
2026-09-22 13:13 ` Alex Elder
2026-09-23 7:18 ` Krzysztof Kozlowski
2026-09-18 16:52 ` [PATCH 3/4] clk: toshiba: introduce a TC9564 SoC clock and reset driver Alex Elder
2026-09-20 19:39 ` Uwe Kleine-König
2026-09-22 12:37 ` Alex Elder
2026-09-22 12:53 ` Uwe Kleine-König
2026-09-21 22:59 ` Brian Masney
2026-09-22 13:33 ` Alex Elder
2026-09-23 20:58 ` Jerome Brunet
2026-09-23 21:33 ` Alex Elder
2026-09-24 7:29 ` Jerome Brunet
2026-09-24 19:22 ` Brian Masney [this message]
2026-09-18 16:52 ` [PATCH 4/4] arm64: dts: qcom: qcs6490-rb3gen2: add the clock controller Alex Elder
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