From: Andi Shyti <andi.shyti@kernel.org>
To: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Cc: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>,
Sagar Dharia <sdharia@codeaurora.org>,
Karthikeyan Ramasubramanian <kramasub@codeaurora.org>,
Stephen Boyd <swboyd@chromium.org>,
Wolfram Sang <wsa@kernel.org>,
Douglas Anderson <dianders@chromium.org>,
Girish Mahadevan <girishm@codeaurora.org>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v2] i2c: qcom-geni: Fix hardcoded clock index in SE_GENI_CLK_SEL
Date: Fri, 25 Sep 2026 00:07:48 +0200 [thread overview]
Message-ID: <arWfAPy5zdG_swNo@zenone.zhora.eu> (raw)
In-Reply-To: <20260921-i2c-fix-se-clk-conf-v2-1-8b5537ceff2d@oss.qualcomm.com>
Hi Viken,
On Mon, Sep 21, 2026 at 05:17:01PM +0530, Viken Dadhaniya wrote:
> qcom_geni_i2c_conf() writes a hardcoded 0 to SE_GENI_CLK_SEL, which
> selects an index from the hardware clock performance table. This always
> picks the first table entry regardless of the actual source clock
> configuration. On platforms where the matching entry is not at index 0,
> the wrong source clock divider is active and the I2C bus runs at an
> incorrect frequency.
>
> Use geni_se_clk_freq_match() in geni_i2c_clk_map_idx() to find the
> performance table index for the source clock (32 MHz or 19.2 MHz). Store
> the resolved index in a new clk_idx field in geni_i2c_dev and write it
> to SE_GENI_CLK_SEL instead of the hardcoded 0.
>
> Fixes: 37692de5d523 ("i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller")
> Cc: stable@vger.kernel.org
> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
pushed to i2c/i2c-fixes.
Thanks,
Andi
prev parent reply other threads:[~2026-09-24 22:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 11:47 Viken Dadhaniya
2026-09-21 12:03 ` Viken Dadhaniya
2026-09-23 5:31 ` Mukesh Savaliya
2026-09-24 22:07 ` Andi Shyti [this message]
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