Re: [PATCH v3 0/3] i2c: designware: Add TI TDA54 I2C support

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Fri, Sep 25, 2026 at 12:26:27PM +0530, Aniket Limaye wrote:
> Add new compatible and update driver to support Synopsys Advanced I2C
> Controller (DWC_i2c [0]) present on TI TDA54 SoC. This is needed since
> this controller differs from the existing designware i2c (DW_apb_i2c
> [1]) in its register offsets and some register definitions.
> 
> The new compatible updates driver logic due to changes in register
> definitions:
> 
> - The new register offsets are handled by first refactoring the driver
>   to use a map of register IDs to their offsets.
> - Similarly, also update the driver to use an updated CON-register
>   bitfield definition.
> - Interrupts are acknowledged by writing a bitmask to a single CLR_INTR
>   register instead of reading N dedicated CLR_* registers;
>   i2c_dw_ack_intr() picks the right method based on dev->flags.
> - One HCNT/LCNT register pair is shared between standard and fast speed
>   instead of having one pair each; i2c_dw_write_timings() writes
>   whichever value set matches the configured speed.
> - No COMP_PARAM_1 register, so FIFO depth and high-speed-mode support
>   can't be autodetected: FIFO depth now comes from the required
>   snps,tx-fifo-depth/snps,rx-fifo-depth DT properties, and the
>   high-speed capability check is skipped.
> - No defined CON.RESTART_EN bit; treat it as always set.
> - TDA54 SoC does not support SMBus, so skip accesses to those registers.
> 
> [0]: DWC_i2c_reference.pdf
> [1]: DW_apb_i2c_databook.pdf

Still doesn't look good. The current register layout may be left as is. What
you need is translate it in the respective regmap callbacks in case we are
enumerated on the different IP. Also possible to have a different regmap
config for the different HW where you translate them only in one place.

-- 
With Best Regards,
Andy Shevchenko