From: Lorenzo Bianconi <lorenzo.bianconi@oss.qualcomm.com>
To: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Richard Cochran <richardcochran@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
Shawn Guo <shengchao.guo@oss.qualcomm.com>,
Zhangfei Gao <zhangfei.gao@oss.qualcomm.com>,
Jitendra Vegiraju <jitendra.vegiraju@broadcom.com>
Subject: Re: [PATCH RFC net-next 3/9] net: pcs: xpcs: add custom platform register accessors
Date: Fri, 25 Sep 2026 12:18:21 +0200 [thread overview]
Message-ID: <arZKbbCcUG5FgQWi@lore-desk> (raw)
In-Reply-To: <20260923-qcom_xpcs_nord_emac-v1-3-4b1c682af70f@oss.qualcomm.com>
[-- Attachment #1: Type: text/plain, Size: 3074 bytes --]
> Some XPCS integrations do not expose the standard direct or indirect
> register layout. Allow the platform driver to use optional register read
> and write callbacks for both Clause 22 and Clause 45 accesses, while
> retaining the existing access paths when no callbacks are supplied.
>
> Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
> ---
> drivers/net/pcs/pcs-xpcs-plat.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-plat.c
> index e669a7b248ac4677aeb5cd1874108f5c87f837d2..e78a233fb198d940951064a71e8597c6c666bc9d 100644
> --- a/drivers/net/pcs/pcs-xpcs-plat.c
> +++ b/drivers/net/pcs/pcs-xpcs-plat.c
> @@ -24,8 +24,16 @@
> /* Page select register for the indirect MMIO CSRs access */
> #define DW_VR_CSR_VIEWPORT 0xff
>
> +struct dw_xpcs_plat_ops {
> + int (*reg_read)(struct platform_device *pdev, void __iomem *reg_base,
> + int dev, int reg);
> + int (*reg_write)(struct platform_device *pdev, void __iomem *reg_base,
> + int dev, int reg, u16 val);
I guess here we can use the same signature used in
xpcs_mmio_read_reg_{direct,indirect}()/xpcs_mmio_write_reg_{direct,indirect}().
Doing so we can probably have a generic platform ops the driver can set during
probe. What do you think?
Regards,
Lorenzo
> +};
> +
> struct dw_xpcs_plat {
> struct platform_device *pdev;
> + const struct dw_xpcs_plat_ops *ops;
> struct mii_bus *bus;
> bool reg_indir;
> int reg_width;
> @@ -169,6 +177,10 @@ static int xpcs_mmio_read_c22(struct mii_bus *bus, int addr, int reg)
> if (addr != 0)
> return -ENODEV;
>
> + if (pxpcs->ops)
> + return pxpcs->ops->reg_read(pxpcs->pdev, pxpcs->reg_base,
> + MDIO_MMD_VEND2, reg);
> +
> if (pxpcs->reg_indir)
> return xpcs_mmio_read_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg);
> else
> @@ -182,6 +194,10 @@ static int xpcs_mmio_write_c22(struct mii_bus *bus, int addr, int reg, u16 val)
> if (addr != 0)
> return -ENODEV;
>
> + if (pxpcs->ops)
> + return pxpcs->ops->reg_write(pxpcs->pdev, pxpcs->reg_base,
> + MDIO_MMD_VEND2, reg, val);
> +
> if (pxpcs->reg_indir)
> return xpcs_mmio_write_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg, val);
> else
> @@ -195,6 +211,10 @@ static int xpcs_mmio_read_c45(struct mii_bus *bus, int addr, int dev, int reg)
> if (addr != 0)
> return -ENODEV;
>
> + if (pxpcs->ops)
> + return pxpcs->ops->reg_read(pxpcs->pdev, pxpcs->reg_base,
> + dev, reg);
> +
> if (pxpcs->reg_indir)
> return xpcs_mmio_read_reg_indirect(pxpcs, dev, reg);
> else
> @@ -209,6 +229,10 @@ static int xpcs_mmio_write_c45(struct mii_bus *bus, int addr, int dev,
> if (addr != 0)
> return -ENODEV;
>
> + if (pxpcs->ops)
> + return pxpcs->ops->reg_write(pxpcs->pdev, pxpcs->reg_base,
> + dev, reg, val);
> +
> if (pxpcs->reg_indir)
> return xpcs_mmio_write_reg_indirect(pxpcs, dev, reg, val);
> else
>
> --
> 2.34.1
>
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next prev parent reply other threads:[~2026-09-25 10:18 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 1:07 [PATCH RFC net-next 0/9] net: introduce Qualcomm XPCS support and add Nord Ethernet plumbing Mohd Ayaan Anwar
2026-09-23 1:07 ` [PATCH RFC net-next 1/9] dt-bindings: net: pcs: add Qualcomm Nord XPCS Mohd Ayaan Anwar
2026-09-23 1:07 ` [PATCH RFC net-next 2/9] net: pcs: xpcs: add USXGMII Clause 37 autoneg support Mohd Ayaan Anwar
2026-09-23 13:31 ` Mohd Ayaan Anwar
2026-09-23 1:07 ` [PATCH RFC net-next 3/9] net: pcs: xpcs: add custom platform register accessors Mohd Ayaan Anwar
2026-09-23 12:18 ` Andrew Lunn
2026-09-23 12:37 ` Mohd Ayaan Anwar
2026-09-25 10:18 ` Lorenzo Bianconi [this message]
2026-09-23 1:07 ` [PATCH RFC net-next 4/9] net: pcs: xpcs: add Qualcomm Nord platform support Mohd Ayaan Anwar
2026-09-23 12:07 ` Andrew Lunn
2026-09-23 12:57 ` Mohd Ayaan Anwar
2026-09-25 10:37 ` Lorenzo Bianconi
2026-09-23 1:07 ` [PATCH RFC net-next 5/9] net: pcs: xpcs: initialize runtime PM as suspended Mohd Ayaan Anwar
2026-09-25 11:03 ` Lorenzo Bianconi
2026-09-23 1:07 ` [PATCH RFC net-next 6/9] dt-bindings: net: qcom,ethqos: add Qualcomm Nord Mohd Ayaan Anwar
2026-09-23 1:07 ` [PATCH RFC net-next 7/9] net: stmmac: support custom XGMAC register layouts Mohd Ayaan Anwar
2026-09-25 12:22 ` Lorenzo Bianconi
2026-09-23 1:07 ` [PATCH RFC net-next 8/9] net: stmmac: qcom-ethqos: support external PCS Mohd Ayaan Anwar
2026-09-23 1:07 ` [PATCH RFC net-next 9/9] net: stmmac: qcom-ethqos: add Qualcomm Nord support Mohd Ayaan Anwar
2026-09-25 13:02 ` Lorenzo Bianconi
2026-09-23 8:49 ` [PATCH 0/3] Nord ethernet followup Zhangfei Gao
2026-09-23 8:49 ` [PATCH 1/3] net: stmmac: support low-speed USXGMII validation Zhangfei Gao
2026-09-23 12:58 ` Andrew Lunn
2026-09-24 10:39 ` Zhangfei Gao
2026-09-24 14:22 ` Andrew Lunn
2026-09-23 13:09 ` Andrew Lunn
2026-09-24 11:12 ` Zhangfei Gao
2026-09-23 8:49 ` [PATCH 2/3] net: stmmac: qcom-ethqos: configure USXGMII rates Zhangfei Gao
2026-09-23 8:49 ` [PATCH 3/3] net: stmmac: fix 10/100 support and MDIO for DW25GMAC Zhangfei Gao
2026-09-23 12:50 ` [PATCH 0/3] Nord ethernet followup Andrew Lunn
2026-09-24 11:18 ` Zhangfei Gao
2026-09-23 8:50 ` [PATCH RFC net-next 0/9] net: introduce Qualcomm XPCS support and add Nord Ethernet plumbing Zhangfei Gao
2026-09-23 15:15 ` Andrew Lunn
2026-09-23 9:41 ` Maxime Chevallier
2026-09-23 10:43 ` Mohd Ayaan Anwar
2026-09-23 13:17 ` Coia Prant
2026-09-23 14:03 ` Mohd Ayaan Anwar
2026-09-24 5:54 ` Coia Prant
2026-09-23 18:35 ` Andrew Lunn
2026-09-24 5:25 ` Coia Prant
2026-09-23 18:40 ` Andrew Lunn
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