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Fri, 25 Sep 2026 04:03:29 -0700 (PDT) Received: from localhost ([188.216.77.92]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ff04440e2sm48935915e9.0.2026.09.25.04.03.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 04:03:28 -0700 (PDT) Date: Fri, 25 Sep 2026 13:03:28 +0200 From: Lorenzo Bianconi To: Mohd Ayaan Anwar Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Serge Semin , Andrew Lunn , Heiner Kallweit , Russell King , Richard Cochran , Bjorn Andersson , Konrad Dybcio , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Chevallier , Maxime Coquelin , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Shawn Guo , Zhangfei Gao , Jitendra Vegiraju Subject: Re: [PATCH RFC net-next 5/9] net: pcs: xpcs: initialize runtime PM as suspended Message-ID: References: <20260923-qcom_xpcs_nord_emac-v1-0-4b1c682af70f@oss.qualcomm.com> <20260923-qcom_xpcs_nord_emac-v1-5-4b1c682af70f@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="lVoFIgUXX7x55kE9" Content-Disposition: inline In-Reply-To: <20260923-qcom_xpcs_nord_emac-v1-5-4b1c682af70f@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: P6Dv6cesw1q7fTvI_DZLzFXyPVXxahyu X-Authority-Analysis: v=2.4 cv=MI71C8Zl c=1 sm=1 tr=0 ts=6ab65503 cx=c_pps a=1Os3MKEOqt8YzSjcPV0cFA==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=05hQUwIZQIh6G6I0U8UA:9 a=CjuIK1q_8ugA:10 a=QVkzxUxUNwT0qHlZT5MA:9 a=hhpmQAJR8DioWGSBphRh:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI1MDA0MyBTYWx0ZWRfX8qsNjmGc7Dk1 CUNGVla5OuGquyLY6Ut/N+IOBms0fWAd25dUZNt9geE6VdcTZRUBCXB4RdmL3oEMIiwZRs17i71 oXqjHfKIM4fOt16YYnHP0Zx5JPNrw53dVrokrWxCHTZ0XZV2x7vtL+PXIIL+omtK3bN7uRgnX6v hSuO7RApjhtd0AO856bljI9M3+KdGa1SWakzlHhhzNqX4OBcvtPeYV0xjVwmGydiz1b/D/xevK0 4NA7wfQ0yjd2KMENCWeO+7NoIvMzAW7wtfdQ3ZCVWhs9i/3fSloIXkIh/gWy8cE7W/cPa7ID1EL U4IAiBIVs5yFZw1CD0wxBm0wKVYush4wEImRQF2J0BM1BLp4EiZRfetekqZjclHhAjVucQQZiOW ft1VF0yTr4dv6I5rYwPK8uZwo9Z1oR3xcyPIjxPGdmWNxrT5d9E5/SWzImoFm9LolzEDOSGRMFN mGrvjjXdEyT87LzQMuA== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI1MDA0MyBTYWx0ZWRfX+KBddF3+St0e Hjws+UXVHSJ0Dx3QjRIQkRUuOe80vCRDjYuQlh9dorWR91uGcGB+f2cULbJZodXwg4Sc3z/sCbd vYe42/fn8VcMyyxKT1JIYClI22jAiV8= X-Proofpoint-GUID: P6Dv6cesw1q7fTvI_DZLzFXyPVXxahyu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-25_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609250043 --lVoFIgUXX7x55kE9 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > xpcs_plat_init_clk() acquires the optional CSR clock but does not > prepare or enable it. Marking the device runtime-active at that point > makes the PM core assume that the hardware is already powered. >=20 > On Nord, once the XPCS CSR clock was described, the first > pm_runtime_resume_and_get() accessed XPCS registers without invoking > runtime_resume() to enable the clock. The matching runtime put then > invoked runtime_suspend() and attempted to disable a clock which was > never enabled, producing an already-disabled clock warning. >=20 > Initialize the runtime-PM state as suspended instead. The first > register access now runs the resume callback and enables the CSR clock, > while the subsequent suspend callback performs the matching disable. > Check and propagate the state-transition error as part of probe. >=20 > Signed-off-by: Mohd Ayaan Anwar This patch seems a fix to me even for other SoCs. The pcs device is marked as 'PM active' in xpcs_plat_init_clk() but the CSR clock is not actually enabled. Moreover, the CSR clock will not be enabled even in the pm ops since xpcs_plat_pm_runtime_resume() will not be executed (the device is already as PM active). Am I missing something? Regards, Lorenzo > --- > drivers/net/pcs/pcs-xpcs-plat.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-p= lat.c > index e013a5253a22651220e62352d03faabc3a3c3658..328c50940d46eb8e7bea06ecd= 1a20214e3cde61c 100644 > --- a/drivers/net/pcs/pcs-xpcs-plat.c > +++ b/drivers/net/pcs/pcs-xpcs-plat.c > @@ -322,7 +322,11 @@ static int xpcs_plat_init_clk(struct dw_xpcs_plat *p= xpcs) > return dev_err_probe(dev, PTR_ERR(pxpcs->cclk), > "Failed to get CSR clock\n"); > =20 > - pm_runtime_set_active(dev); > + ret =3D pm_runtime_set_suspended(dev); > + if (ret) > + return dev_err_probe(dev, ret, > + "Failed to set runtime-PM suspended state\n"); > + > ret =3D devm_pm_runtime_enable(dev); > if (ret) { > dev_err(dev, "Failed to enable runtime-PM\n"); >=20 > --=20 > 2.34.1 >=20 --lVoFIgUXX7x55kE9 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCarZVAAAKCRA6cBh0uS2t rLCrAQCobR+wMwviJitki0D8UXg+bk1Lsss+ylzGxdzBJPlCvwEA06MlQVLUPViq 8IliKoIeVuqVM6Tj5hwuPKqdwtvAwws= =qJHD -----END PGP SIGNATURE----- --lVoFIgUXX7x55kE9--