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[73.183.53.213]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93cca2ec917sm242866585a.46.2026.10.02.08.23.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2026 08:23:37 -0700 (PDT) Date: Fri, 2 Oct 2026 11:23:35 -0400 From: Brian Masney To: Conor Dooley Cc: Junhui Liu , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks Message-ID: References: <20261002-dr1v90-cru-dt-fix-v1-0-c3e0b5d4c30d@pigmoral.tech> <20261002-dr1v90-cru-dt-fix-v1-2-c3e0b5d4c30d@pigmoral.tech> <20261002-manpower-croon-26d578f57143@wendy> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261002-manpower-croon-26d578f57143@wendy> User-Agent: Mutt/2.4.2 (2026-08-30) Hi Conor, On Fri, Oct 02, 2026 at 08:09:08AM +0100, Conor Dooley wrote: > On Fri, Oct 02, 2026 at 02:07:01PM +0800, Junhui Liu wrote: > > The external CAN and watchdog clock inputs are not routed on the MLKPAI > > FS01, the only board currently supported. Drop the two fixed-clock > > placeholders from the common dtsi, as fixed clocks require a valid > > clock-frequency property. > > > > Both clock muxes select their internal parent clocks after reset, so > > the CRU operates correctly without the external inputs. Keep only the > > required oscillator input to the CRU. > > > > A board using these external clocks should define them in its own > > board-level dts and override the clocks and clock-names properties of > > the CRU node. > > > > Reported-by: Yixun Lan > > Fixes: 7849521aaac2 ("riscv: dts: anlogic: add clocks and CRU for DR1V90") > > Uh, why is this in linux next? > > Brian, please don't apply dts patches to the clock (or any other) driver > tree in the future. OK, sorry. I just checked clk-next and this is the only dts that I applied. I'll rebase clk-next and drop this so that the tree only contains the drivers. Brian > > Patch itself makes total sense, > Reviewed-by: Conor Dooley > and because it's easier > Acked-by: Conor Dooley > > > Signed-off-by: Junhui Liu > > --- > > arch/riscv/boot/dts/anlogic/dr1v90.dtsi | 16 ++-------------- > > 1 file changed, 2 insertions(+), 14 deletions(-) > > > > diff --git a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi > > index 574c6608aef0..fe85d01563ad 100644 > > --- a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi > > +++ b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi > > @@ -44,23 +44,11 @@ cpu0_intc: interrupt-controller { > > }; > > > > clocks { > > - can_ext: clock-ext-can { > > - compatible = "fixed-clock"; > > - clock-output-names = "can_ext"; > > - #clock-cells = <0>; > > - }; > > - > > osc: clock-osc { > > compatible = "fixed-clock"; > > clock-output-names = "osc"; > > #clock-cells = <0>; > > }; > > - > > - wdt_ext: clock-ext-wdt { > > - compatible = "fixed-clock"; > > - clock-output-names = "wdt_ext"; > > - #clock-cells = <0>; > > - }; > > }; > > > > soc { > > @@ -128,8 +116,8 @@ uart1: serial@f8401000 { > > cru: clock-controller@f8801000 { > > compatible = "anlogic,dr1v90-cru"; > > reg = <0x0 0xf8801000 0 0x400>; > > - clocks = <&osc>, <&can_ext>, <&wdt_ext>; > > - clock-names = "osc", "can_ext", "wdt_ext"; > > + clocks = <&osc>; > > + clock-names = "osc"; > > #clock-cells = <1>; > > #reset-cells = <1>; > > }; > > > > -- > > 2.55.0 > >