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[2a02:3100:9c32:f801:9d9d:c89f:9fb1:4ec2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a00cfecb39sm118395395e9.7.2026.09.29.14.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 14:25:39 -0700 (PDT) Date: Tue, 29 Sep 2026 23:25:37 +0200 From: Karl Mehltretter To: Sebastian Andrzej Siewior Cc: Peter Zijlstra , Thomas Gleixner , Frederic Weisbecker , Clark Williams , Steven Rostedt , Boqun Feng , Lyude Paul , Joel Fernandes , Alexander Potapenko , Marco Elver , Jonathan Corbet , Bradley Morgan , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev Subject: Re: [PATCH v4] softirq: Preserve interrupt context during IRQ exit Message-ID: References: <20260926143505.66024-1-kmehltretter@gmail.com> <20260928082402.1iCSzDzY@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260928082402.1iCSzDzY@linutronix.de> On Mon, Sep 28, 2026 at 10:24:02AM +0100, Sebastian Andrzej Siewior wrote: > could you please do > (in_nmi() | hardirq_count()) == HARDIRQ_OFFSET) > instead? This will merge NMI check into the hardirq check, dropping one > conditional jump away. > Hello Sebastian, Good catch. With GCC it removes one conditional branch on x86-64, arm64 and arm32. On x86-64 it also uses three fewer instructions. I will send this tweaked version soon. Thanks for the review! Karl