From: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Wesley Cheng <quic_wcheng@quicinc.com>,
Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] dt-bindings: usb: qcom,snps-dwc3: Add IPQ9650 compatible
Date: Wed, 30 Sep 2026 10:57:31 +0530 [thread overview]
Message-ID: <arydw47qwT7jHVsV@hu-varada-blr.qualcomm.com> (raw)
In-Reply-To: <20260928-gentle-lemming-of-ampleness-4b4c77@quoll>
On Mon, Sep 28, 2026 at 01:00:46PM +0200, Krzysztof Kozlowski wrote:
> On Thu, Sep 24, 2026 at 01:19:05PM +0530, Varadarajan Narayanan wrote:
> > Add the qcom,ipq9650-dwc3 compatible for the two DWC3 USB controllers found
> > on IPQ9650, using qcom,snps-dwc3 as the fallback compatible.
> >
> > One controller is connected to a High-Speed PHY, while the other is
> > connected to both High-Speed and SuperSpeed PHYs.
> >
> > Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> > ---
> > Add bindings and dwc3-qcom glue driver changes for adding support to the
> > two USB controllers present in IPQ9650.
> > ---
> > Changes in v2:
> > - Rebase to top of tree
> > - Drop 'usb: dwc3: qcom: Allow the glue layer to pass ref_clk to the core'.
> > This will be taken care of the by https://lore.kernel.org/linux-arm-msm/20260906-ipq-flatten-usb-v3-2-13e4e0f63123@outlook.com/
> > - Add ipq9650 to existing clock constraints instead of new constraints
> > - Link to v1: https://lore.kernel.org/r/20260825-ctrl-v1-0-609e2291814d@oss.qualcomm.com
> > ---
> > Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
> > index 9f91c8711e02..a8fbf72c6375 100644
> > --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
> > +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
> > @@ -36,6 +36,7 @@ properties:
> > - qcom,ipq8064-dwc3
> > - qcom,ipq8074-dwc3
> > - qcom,ipq9574-dwc3
> > + - qcom,ipq9650-dwc3
> > - qcom,kaanapali-dwc3
> > - qcom,maili-dwc3
> > - qcom,milos-dwc3
> > @@ -210,6 +211,7 @@ allOf:
> > - qcom,ipq5210-dwc3
> > - qcom,ipq5424-dwc3
> > - qcom,ipq9574-dwc3
> > + - qcom,ipq9650-dwc3
>
> You had 6 clocks before, now only 5. Not explained in the changelog.
Sorry about not being explicit in the change log. The additional clock was
supposed to be passed to the dwc3 core layer for it to get the reference
clock rate. Have dropped that in favour of using [1].
Since '[PATCH 2/2] usb: dwc3: qcom: Allow the glue layer to pass ref_clk to
the core' (please see [2]) was dropped, don't need the additional clock.
Hence the change from 6 clocks to 5.
1 - https://lore.kernel.org/linux-arm-msm/20260906-ipq-flatten-usb-v3-2-13e4e0f63123@outlook.com/
2 - https://lore.kernel.org/linux-arm-msm/20260825-ctrl-v1-2-609e2291814d@oss.qualcomm.com/
Thanks
Varada
next prev parent reply other threads:[~2026-09-30 5:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 7:49 Varadarajan Narayanan
2026-09-28 11:00 ` Krzysztof Kozlowski
2026-09-30 5:27 ` Varadarajan Narayanan [this message]
2026-09-30 9:17 ` Krzysztof Kozlowski
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