From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Phil Rosenthal <phil@phil.gs>
Cc: "git@gregoirelayet.com" <git@gregoirelayet.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Lubomir Rintel <lkundrak@v3.sk>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Lee Jones <lee@kernel.org>,
Tan Siewert <tan.siewert@9elements.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
"mfd@lists.linux.dev" <mfd@lists.linux.dev>,
"andrew@lunn.ch" <andrew@lunn.ch>,
"jacky_chou@aspeedtech.com" <jacky_chou@aspeedtech.com>,
"yh_chung@aspeedtech.com" <yh_chung@aspeedtech.com>,
"ninad@linux.ibm.com" <ninad@linux.ibm.com>,
"anirudhsriniv@gmail.com" <anirudhsriniv@gmail.com>,
"andy@kernel.org" <andy@kernel.org>
Subject: Re: [PATCH v6 4/6] mfd: aspeed-pci-core: add AST2600 PCIe BMC device driver
Date: Tue, 13 Oct 2026 09:22:15 +0300 [thread overview]
Message-ID: <as3OF7O5hnImaAWO@ashevche-desk.local> (raw)
In-Reply-To: <C5A01ECE-9A61-4BCA-88C6-83A1673AA69C@phil.gs>
On Tue, Oct 13, 2026 at 03:04:43AM +0000, Phil Rosenthal wrote:
...
> The simplest fix would be to make aspeed,lpc-interrupts required
> together with aspeed,vuart-over-pci in the binding, or to set SIRQ 0
> and 1 for vuart3 and vuart4 in patch 6/6, so the BMC side always
> matches the host's table.
>
> The more robust option is to find the vectors at probe, which Tan asked
> about in that thread. That works whatever SIRQs the BMC side uses, so a
> board DT that leaves them out or gets them wrong still gets interrupts,
> and if no vector can be found, the ports fall back to polling instead of
> waiting on a vector that never fires. It would also be the basis for
> stock firmware support if that ends up in this series.
I interpret this clearly as "Let's allow vendors to continue making mistakes
and provide wrong DT/configuration bits." My vote is definitely *no* to a such.
If this needs to be done to support some weird firmware in the wild it must:
- be a quirk that is clear sign that one has avoid such an example
- inform the vendor to fix their crap
Did I get it wrong?
> It's the MSI counterpart of what the 8250 core's autoconfig_irq() does for
> legacy ports with UPF_AUTO_IRQ; I described the method in [1], and it's
> aspeed_pci8250_find_irqs() in [2]. With the DT fix above your boards
> don't strictly need it, but I'm happy to send it as a patch for
> aspeed-pci-core if you'd like it.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-10-13 6:22 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 10:29 [PATCH v6 0/6] soc: aspeed: Add BMC and host driver for PCIe BMC device Grégoire Layet
2026-08-18 10:29 ` [PATCH v6 1/6] dt-bindings: serial: 8250: aspeed: add ast2600 and aspeed,vuart-over-pci Grégoire Layet
2026-08-18 10:29 ` [PATCH v6 2/6] serial: 8250_aspeed_vuart: add aspeed,ast2600-vuart compatible string Grégoire Layet
2026-08-18 10:29 ` [PATCH v6 3/6] serial: 8250_aspeed_vuart: add VUART over PCI Grégoire Layet
2026-08-18 10:29 ` [PATCH v6 4/6] mfd: aspeed-pci-core: add AST2600 PCIe BMC device driver Grégoire Layet
2026-08-19 14:02 ` Tan Siewert
2026-08-19 14:19 ` Grégoire Layet
2026-10-13 3:04 ` Phil Rosenthal
2026-10-13 6:22 ` Andy Shevchenko [this message]
2026-10-13 13:09 ` Phil Rosenthal
2026-08-18 10:29 ` [PATCH v6 5/6] ARM: dts: aspeed: g6: Change vuart compatible string for ast2600 Grégoire Layet
2026-08-18 10:29 ` [PATCH v6 6/6] ARM: dts: aspeed: g6: add aspeed,vuart-over-pci prop to vuart3 and 4 Grégoire Layet
2026-08-19 14:02 ` Tan Siewert
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