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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-353814b556esm54827471eec.18.2026.10.13.22.03.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2026 22:03:30 -0700 (PDT) Date: Wed, 14 Oct 2026 10:33:24 +0530 From: Varadarajan Narayanan To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Abel Vesa , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 06/11] arm64: dts: qcom: ipq5210: Add ICE support to SDHCI Message-ID: References: <20261012-08-dts-v7-0-77bd3d68d850@oss.qualcomm.com> <20261012-08-dts-v7-6-77bd3d68d850@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Authority-Analysis: v=2.4 cv=GL+dgeNK c=1 sm=1 tr=0 ts=6acf0d25 cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=Q92GnTf-AHtPrQ-LojcA:9 a=CjuIK1q_8ugA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-ORIG-GUID: 8y-s75_h8OQomz9uy7g8f1qEs6i3fVrW X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE0MDAxOSBTYWx0ZWRfXxveUDY9uB7Rc dHcSTOfxBX13bwvF7FN8Gj7zH0yzOg5NPfHvzat1K0cLpw9oorgFNHTOQwPBcGRF/I4CUNlj2jW OvzFoIeR5WSfPXo4uVPRjUAzTHx9T+U= X-Proofpoint-GUID: 8y-s75_h8OQomz9uy7g8f1qEs6i3fVrW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE0MDAxOSBTYWx0ZWRfXw5W+CCvoNE/d c9tXexOlL9apnsaW0mkmLZMzRLXFyODJFGijHIhiqJAgjvbBabMlwYjUgNQxrhcaP3winw2U0AA JwzLLHk9+sfWC+5764elbJRJ8hwQZXJ87/jXc/YHixPjPsh0lFNwAoszknwq7m3jZEK0eRDWogJ XRVIkxY26JYwVp6hG4tYWIOFF+aHAa/Yj6tP17IZJxYIi7p3Z2vpufYDGM862PQ14QwuHMJs9Wo 2BOX0QN+58NbsjBUpat/fdQxn8qgnKKciGo2UEdTS/PqcU8YFLZvSOOOWc+nkbnLEzkdCK08YTz 57CZCimcvRuYsYrz9Up8t5tvXBohv3FR6FTznKSg28hFmjdWUR2Uqo41U3SL8KmVXv3Qivd5yJv xeI9xHk6JAEH04OlEzINZVPiOXi9bIS5pO62fhFU8qw1nDFsVQXgpJ4NQiZpnQ1SF4J3DqwtAjn Ve9P5paPjSFWtlktUPA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 bulkscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610140019 On Tue, Oct 13, 2026 at 04:43:36PM +0200, Konrad Dybcio wrote: > On 10/12/26 9:23 AM, Varadarajan Narayanan wrote: > > Describe the SDHCI ICE register region and clock, and enable CQE support > > for the IPQ5210 SDHCI controller. > > > > Signed-off-by: Varadarajan Narayanan > > --- > > arch/arm64/boot/dts/qcom/ipq5210.dtsi | 15 +++++++++++---- > > 1 file changed, 11 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi > > index d28d68a10958..c14b42c22616 100644 > > --- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi > > +++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi > > @@ -416,9 +416,11 @@ uart1: serial@1a84000 { > > sdhc: mmc@7804000 { > > compatible = "qcom,ipq5210-sdhci", "qcom,sdhci-msm-v5"; > > reg = <0x0 0x07804000 0x0 0x1000>, > > - <0x0 0x07805000 0x0 0x1000>; > > + <0x0 0x07805000 0x0 0x1000>, > > + <0x0 0x07808000 0x0 0x2000>; > > reg-names = "hc", > > - "cqhci"; > > + "cqhci", > > + "ice"; > > This should be a separate node, like on other SoCs to allow things > like frequency scaling Not sure I understand the comment correctly. I checked agatti, sdm630, sdm670, sm6350, talos DT files and they have added the ICE region similar to this. Can you please suggest an example, will follow that. Thanks Varada