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Wed, 14 Oct 2026 03:20:03 -0700 (PDT) Received: from localhost ([188.216.77.92]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48de0bc50e0sm14157454f8f.49.2026.10.14.03.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 03:20:02 -0700 (PDT) Date: Wed, 14 Oct 2026 12:20:01 +0200 From: Lorenzo Bianconi To: Sagar Cheluvegowda Cc: Maxime Chevallier , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hongmei Xu , Abhishek Chauhan , Sarosh Hasan Subject: Re: [PATCH net-next v3] net: stmmac: dwxgmac2: enable L2 split header support Message-ID: References: <20261013192759.776537-1-sagar.cheluvegowda@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Va93bnXPgVMhmS7J" Content-Disposition: inline In-Reply-To: <20261013192759.776537-1-sagar.cheluvegowda@oss.qualcomm.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE0MDA0MSBTYWx0ZWRfX08N64de2h6Be 6+X+i1m5c9pnAq6gO3oagHNfpImpllhw/up/JPAtcFafDYxa64GNnOk3SdlZGFKNjEt2+MrLzG6 DV77sD9Hd/QDmJJlGu7nvwSvFA920vxLIyCKKPxpMbZjWsX74vyR5kfSKFeK1Oejh7pT1T0WngM nfy2cbJm3lRcr+h1SLDB9Pj6qYCNHnvXEQ7H1EyqpVa60q3UM4OR0mimvTC1uFbejdYN9wXxgF4 YsipvwJrzoHqMOgem1+QEWSBoCY0SL2qMxR/gFkagPg4uodXFuebpUShaN9edgIA6HXDRP/4SOh ogOdBqT6gGZARhuoG1TB9APb2qKnhhXhSrVprkfjHlkGCfsfb1koq3Wi1pXSIWnYzfgZ29QrsaK FWtlgG97idN3ra34v87MAA9kg4cz0eJmVYKPxgyeungzqmz8FFCnN1dvm29aXkPZuA+2DvXPMKb ctPKF7zuh/rLibcobXw== X-Authority-Analysis: v=2.4 cv=LPPz05W9 c=1 sm=1 tr=0 ts=6acf5755 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=K8_CPFW8AYnmyr30bPQA:9 a=CjuIK1q_8ugA:10 a=4yWUPP8YMvIpZnTD_-MA:9 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE0MDA0MSBTYWx0ZWRfX4CdS7KusTODu jef+Jg80/04Bwm0WSJ7RptwzGtJgV2MxTQ+xUgg1JHDVcRs3B/z9Nv6wcAJdwQEwkPjt5QKr9I3 zNAzdYMx1YfQhGVbY2NHVpjg9mYknJo= X-Proofpoint-ORIG-GUID: svBq9whEKz61xRZeBgYmveKiEYkN049W X-Proofpoint-GUID: svBq9whEKz61xRZeBgYmveKiEYkN049W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610140041 --Va93bnXPgVMhmS7J Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Oct 13, Sagar Cheluvegowda wrote: > XGMAC2 doesn't program the MAC extended configuration registers > needed for L2 header splitting when split-header mode is enabled, > so tagged AV packets can't use the split-header path. Configure > split mode (SPLM) and header saving (SAVE_EN) in XGMAC_EXT_CFG1, > extending the dwmac4 sequence added by commit d10f1a4e44c3 ("net: > stmmac: Programming sequence for VLAN packets with split header") > to XGMAC2. >=20 > Also fix the RX header-length calculation for split-header > descriptors. Per the XGMAC2 descriptor format, RDES3's L34T and > L2T fields are only valid on the last descriptor (LD set); on a > non-last descriptor they can hold stale write-back data from a > previous packet. Read the header length from RDES2[9:0] directly > for non-last descriptors, and only consult L34T/L2T on the last > descriptor: RDES2[9:0] for IP packets (L34T set) and RDES2[9:2] > for non-IP packets (L2T set). >=20 > Finally, disable the variable-length preamble when L2 splitting > is enabled. A variable-length preamble shifts the position of the > Ethernet header, making the L2 split offset non-deterministic. >=20 > Co-developed-by: Abhishek Chauhan > Signed-off-by: Abhishek Chauhan > Co-developed-by: Sarosh Hasan > Signed-off-by: Sarosh Hasan > Signed-off-by: Sagar Cheluvegowda > --- > v3: > - Use zero-padded 0x00000140 for XGMAC_EXT_CFG0 > v2: https://lore.kernel.org/netdev/20261007183905.2582759-1-sagar.cheluve= gowda@oss.qualcomm.com/ > - Add XGMAC_CONFIG1_SPLM_MASK and use it in XGMAC_CONFIG1_SPLM() > v1: https://lore.kernel.org/netdev/20260922232116.889630-1-sagar.cheluveg= owda@oss.qualcomm.com/ >=20 > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 8 ++++++++ > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c | 12 +++++++++++- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 10 ++++++++++ > 3 files changed, 29 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net= /ethernet/stmicro/stmmac/dwxgmac2.h > index f8ab347f7b5b..7d1a7802a131 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -167,6 +167,12 @@ > #define XGMAC_HW_FEATURE4 0x0000012c > #define XGMAC_HWFEAT_EASP BIT(4) > #define XGMAC_HWFEAT_PCSEL GENMASK(1, 0) > +#define XGMAC_EXT_CFG0 0x00000140 > +#define XGMAC_EXT_CFG0_VPRE BIT(8) > +#define XGMAC_EXT_CFG1 0x00000144 > +#define XGMAC_CONFIG1_SAVE_EN BIT(24) > +#define XGMAC_CONFIG1_SPLM_MASK GENMASK(9, 8) > +#define XGMAC_CONFIG1_SPLM(v) FIELD_PREP(XGMAC_CONFIG1_SPLM_MASK, v) > #define XGMAC_MAC_DPP_FSM_INT_STATUS 0x00000150 > #define XGMAC_MAC_FSM_CONTROL 0x00000158 > #define XGMAC_PRTYEN BIT(1) > @@ -434,6 +440,7 @@ > #define XGMAC_RDES2_L4FM BIT(28) > #define XGMAC_RDES2_L3FM BIT(27) > #define XGMAC_RDES2_HL GENMASK(9, 0) > +#define XGMAC_RDES2_NONIPHL GENMASK(9, 2) > #define XGMAC_RDES3_OWN BIT(31) > #define XGMAC_RDES3_CTXT BIT(30) > #define XGMAC_RDES3_IOC BIT(30) > @@ -441,6 +448,7 @@ > #define XGMAC_RDES3_CDA BIT(27) > #define XGMAC_RDES3_RSV BIT(26) > #define XGMAC_RDES3_L34T GENMASK(23, 20) > +#define XGMAC_RDES3_L2T GENMASK(19, 16) > #define XGMAC_RDES3_ET_LT GENMASK(19, 16) > #define XGMAC_L34T_IP4TCP 0x1 > #define XGMAC_L34T_IP4UDP 0x2 > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drive= rs/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > index 6719ac6e395b..65ac5403ec58 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > @@ -292,8 +292,18 @@ static int dwxgmac2_get_rx_hash(struct dma_desc *p, = u32 *hash, > =20 > static void dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int = *len) > { > - if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T) > + u32 rdes3 =3D le32_to_cpu(p->des3); > + > + /* when FD=3D1 and LD=3D0, HL is RDES2[9:0] */ > + if (!(rdes3 & XGMAC_RDES3_LD)) { > + *len =3D le32_to_cpu(p->des2) & XGMAC_RDES2_HL; > + return; > + } > + > + if (rdes3 & XGMAC_RDES3_L34T) should we check FD=3D1 here? Since HL is not defined for the case {FD=3D0,L= D=3D1}, right? > *len =3D le32_to_cpu(p->des2) & XGMAC_RDES2_HL; > + else if (rdes3 & XGMAC_RDES3_L2T) > + *len =3D (le32_to_cpu(p->des2) & XGMAC_RDES2_NONIPHL) >> 2; same here. Regards, Lorenzo > } > =20 > static void dwxgmac2_set_sec_addr(struct dma_desc *p, dma_addr_t addr, b= ool is_valid) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers= /net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > index ff83858ebc1f..0a9c787305a4 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > @@ -561,6 +561,16 @@ static void dwxgmac2_enable_sph(struct stmmac_priv *= priv, void __iomem *ioaddr, > value |=3D XGMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ > writel(value, ioaddr + XGMAC_RX_CONFIG); > =20 > + value =3D readl(ioaddr + XGMAC_EXT_CFG1); > + value |=3D XGMAC_CONFIG1_SPLM(1); > + value |=3D XGMAC_CONFIG1_SAVE_EN; > + writel(value, ioaddr + XGMAC_EXT_CFG1); > + > + /* Disable variable preambles to keep the L2 split offset deterministic= =2E */ > + value =3D readl(ioaddr + XGMAC_EXT_CFG0); > + value &=3D ~XGMAC_EXT_CFG0_VPRE; > + writel(value, ioaddr + XGMAC_EXT_CFG0); > + > value =3D readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); > if (en) > value |=3D XGMAC_SPH; > --=20 > 2.34.1 >=20 --Va93bnXPgVMhmS7J Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCas9XUQAKCRA6cBh0uS2t rG4HAP4goEYjxrArM6TdJd+MFIeqzUtidp4JYTu12RjAE+mlUwD/e5GewtsO9RV7 k+CeJufRbJRvlTiMT8RjKAZEgMRGYwE= =sUaN -----END PGP SIGNATURE----- --Va93bnXPgVMhmS7J--