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From: Shawn Guo <shengchao.guo@oss.qualcomm.com>
To: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	brgl@kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Abel Vesa <abel.vesa@oss.qualcomm.com>
Subject: Re: [PATCH v2 2/4] arm64: dts: qcom: nord-embedded: Add USB resources and PHYs
Date: Thu, 8 Oct 2026 10:18:10 +0800	[thread overview]
Message-ID: <asb9YupPzr9RYV9R@QCOM-aGQu4IUr3Y> (raw)
In-Reply-To: <20260922-nord-usb-dwc-dts-v2-2-ba2b39f1a843@oss.qualcomm.com>

On Tue, Sep 22, 2026 at 05:01:08PM +0200, Bartosz Golaszewski wrote:
> Add the platform resources for the three USB controllers on the embedded
> Nord variant: clocks, resets, power domains and interconnect paths.
> 
> Add the eUSB2 PHY for each of the three controllers, plus the QMP combo
> PHYs for USB_0 and USB_1, and feed the two QMP USB3 pipe clocks back
> into negcc, which so far carried placeholder zeros in their place.
> 
> The eUSB2 PHY of instance 2 gets no 'resets': the SoC provides only two
> QUSB2PHY block resets, belonging to instances 0 and 1. Instance 2 comes
> out of reset with the rest of the USB20 tile, driven by the controller.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 311 +++++++++++++++++++++++++++-
>  1 file changed, 309 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> index c7ac2e66632e57852f6dd88d8070d5c28cf70d2f..e7ff8c420300f34a2ad4063ecad8a31f08b8d80b 100644
> --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/interconnect/qcom,icc.h>
>  #include <dt-bindings/interconnect/qcom,nord-rpmh.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
>  #include <dt-bindings/power/qcom,rpmhpd.h>
>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>  
> @@ -842,6 +843,161 @@ hpass_ag_noc: interconnect@5fc0000 {
>  		qcom,bcm-voters = <&apps_bcm_voter>;
>  	};
>  
> +	usb_2_hsphy: phy@88e0000 {
> +		compatible = "qcom,nord-snps-eusb2-phy",
> +			     "qcom,sm8550-snps-eusb2-phy";
> +		reg = <0x0 0x088e0000 0x0 0x154>;
> +
> +		clocks = <&tcsrcc TCSR_USB2_2_CLKREF_EN>;
> +		clock-names = "ref";

Bartosz,

I just sent out a series to add missing AHB2PHY bridge clock for Nord
USB PHY bindings/drivers [1]. Could you update this patch to include
this clock when you send v3, so that we can get USB work without
clk_ignore_unused kernel parameter?

Shawn

[1] https://lore.kernel.org/all/20261008015017.3359804-1-shengchao.guo@oss.qualcomm.com/

  parent reply	other threads:[~2026-10-08  2:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22 15:01 [PATCH v2 0/4] arm64: dts: qcom: nord: Add USB support Bartosz Golaszewski
2026-09-22 15:01 ` [PATCH v2 1/4] arm64: dts: qcom: nord: Add the USB controller nodes Bartosz Golaszewski
2026-09-25 12:55   ` Konrad Dybcio
2026-09-22 15:01 ` [PATCH v2 2/4] arm64: dts: qcom: nord-embedded: Add USB resources and PHYs Bartosz Golaszewski
2026-09-22 15:49   ` Konrad Dybcio
2026-10-08  2:18   ` Shawn Guo [this message]
2026-10-08  9:35     ` Bartosz Golaszewski
2026-09-22 15:01 ` [PATCH v2 3/4] arm64: dts: qcom: nord-rrd: Enable USB ports Bartosz Golaszewski
2026-09-25 12:56   ` Konrad Dybcio
2026-10-08  9:53   ` Dmitry Baryshkov
2026-09-22 15:01 ` [PATCH v2 4/4] arm64: dts: qcom: nord-ride-embedded: " Bartosz Golaszewski
2026-09-23 12:05   ` Shawn Guo

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