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Thu, 8 Oct 2026 20:26:38 +0000 Date: Thu, 8 Oct 2026 15:26:34 -0500 From: Frank Li To: "Peng Fan (OSS)" Cc: Linus Walleij , Bartosz Golaszewski , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shenwei Wang , Andy Shevchenko , linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: Re: [PATCH v4 10/10] gpio: mxc: use BIT() macro for single-bit operations Message-ID: References: <20261007-gpio-mxc-cleanup-v4-0-c9f5a8b50df9@nxp.com> <20261007-gpio-mxc-cleanup-v4-10-c9f5a8b50df9@nxp.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261007-gpio-mxc-cleanup-v4-10-c9f5a8b50df9@nxp.com> X-ClientProxiedBy: AM0P309CA0010.EURP309.PROD.OUTLOOK.COM (2603:10a6:20b:28f::17) To GV2PR04MB11799.eurprd04.prod.outlook.com (2603:10a6:150:2cf::9) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB11799:EE_|AM9PR04MB8876:EE_ X-MS-Office365-Filtering-Correlation-Id: cad19d98-d3e7-4180-aa6b-08df257a746a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|1800799024|366016|7416014|376014|19092799006|6133799003|22082099003|18002099003|10067099003|4143699003|11063799006|56012099006; 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> void __iomem *reg = port->base; > > - port->both_edges &= ~(1 << gpio_idx); > + port->both_edges &= ~BIT(gpio_idx); > switch (type) { > case IRQ_TYPE_EDGE_RISING: > edge = GPIO_INT_RISE_EDGE; > @@ -229,7 +229,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) > edge = GPIO_INT_HIGH_LEV; > pr_debug("mxc: set GPIO %d to high trigger\n", gpio_idx); > } > - port->both_edges |= 1 << gpio_idx; > + port->both_edges |= BIT(gpio_idx); > } > break; > case IRQ_TYPE_LEVEL_LOW: > @@ -246,10 +246,10 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) > if (GPIO_EDGE_SEL >= 0) { > val = readl(port->base + GPIO_EDGE_SEL); > if (edge == GPIO_INT_BOTH_EDGES) > - writel(val | (1 << gpio_idx), > + writel(val | BIT(gpio_idx), > port->base + GPIO_EDGE_SEL); > else > - writel(val & ~(1 << gpio_idx), > + writel(val & ~BIT(gpio_idx), > port->base + GPIO_EDGE_SEL); > } > > @@ -259,7 +259,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) > writel(val | field_prep(MXC_ICR_MASK(gpio_idx), edge), reg); > } > > - writel(1 << gpio_idx, port->base + GPIO_ISR); > + writel(BIT(gpio_idx), port->base + GPIO_ISR); > port->pad_type[gpio_idx] = type; > } > > @@ -298,12 +298,12 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) > while (irq_stat != 0) { > int irqoffset = fls(irq_stat) - 1; > > - if (port->both_edges & (1 << irqoffset)) > + if (port->both_edges & BIT(irqoffset)) > mxc_flip_edge(port, irqoffset); > > generic_handle_domain_irq(port->domain, irqoffset); > > - irq_stat &= ~(1 << irqoffset); > + irq_stat &= ~BIT(irqoffset); > } > } > > > -- > 2.51.0 > >