From: Andi Shyti <andi.shyti@kernel.org>
To: Hitesh Patel <hitesh@ebytelogic.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Robert Foss <rfoss@kernel.org>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, ravi@ebytelogic.com
Subject: Re: [PATCH v3] i2c: qcom-cci: always enable SCL clock stretching
Date: Fri, 9 Oct 2026 11:03:08 +0200 [thread overview]
Message-ID: <asittIGjIL-oLnUe@zenone.zhora.eu> (raw)
In-Reply-To: <20261007050147.274096-1-hitesh@ebytelogic.com>
Hi Hitesh,
On Wed, Oct 07, 2026 at 10:31:46AM +0530, Hitesh Patel wrote:
> The CCI timing tables leave SCL clock stretching disabled. A slave that
> holds SCL low is then not waited for: the master keeps its own clock
> timing and the transfer fails with a NACK or returns corrupt data.
>
> This is hit with a camera reached through a GMSL serializer/deserializer
> I2C tunnel (MAX9296A/MAX96717 on the RB3 Gen2 vision mezzanine). The
> deserializer acknowledges the address locally, but forwards the
> transaction over the coax link and stretches SCL until the remote side
> has completed it, which takes well over one clock period at 100 kHz.
> Without stretching the register reads of the sensor behind the link
> intermittently return garbage and writes are dropped, which shows up as
> random sensor init failures.
>
> Clock stretching is part of the I2C specification for every speed mode
> and a device that does not stretch is unaffected by enabling it, so set
> the bit unconditionally in cci_init() and drop the per-table
> scl_stretch_en field, which is zero in every table.
>
> Signed-off-by: Hitesh Patel <hitesh@ebytelogic.com>
> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
pushed to i2c/i2c.
Thanks,
Andi
prev parent reply other threads:[~2026-10-09 9:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 5:01 Hitesh Patel
2026-10-08 8:30 ` hangxiang.ma
2026-10-09 9:03 ` Andi Shyti [this message]
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