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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3537ca0e64csm36303294eec.10.2026.10.12.06.16.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2026 06:16:16 -0700 (PDT) Date: Mon, 12 Oct 2026 21:16:09 +0800 From: Shawn Guo To: Krishna Chaitanya Chundru Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Bjorn Andersson , Maxime Chevallier , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Konrad Dybcio Subject: Re: [PATCH v4 3/6] PCI: qcom: Add Nord PCIe controller support Message-ID: References: <20260921-nord-v4-0-ed05c6e09240@oss.qualcomm.com> <20260921-nord-v4-3-ed05c6e09240@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260921-nord-v4-3-ed05c6e09240@oss.qualcomm.com> X-Proofpoint-Spam-Info: AW1haW4tMjYxMDEyMDA1MiBTYWx0ZWRfX6CBMBHdIFswx LkpipE4+6wFlEVpuSt2JAbcGacmplmrKd4ZgJ3unzBx1DKySpt8+3Ld+ZAJV6HNIPMzN0M0+ikH djHc48dj6CLRPEDWVwWBmaZnI478xFM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDEyMDA1MiBTYWx0ZWRfX8bmSve4z8vpl QJpZafZwd6UOa3pC8feSQgemf7yNWZa6GeWVm/7jn1NnLyafAEvoX0Mp1M3hC4D2HdoEjRHqVNu ylrkRQfctIfbkRCKRuA7dkcgHogmtT4JKiRzrodKzfgkBhr3dVdfWu8XLNLYq5U59n7Erk+aynn p+RwIba9EyZhM5uG+ltMcNXy1tE7F3lAIM8vgRKCejSug/l3vMs86iZoEKny/7DQA3+mJBtOHWM aRH/Hriho5FUWGEAvMVvp8cvBc4IyLQaBt6EDCk+KkGUP1GOE6qqWy4P1NXICxzS0YzSgo/qSLM UfyxJLWppLvQgc6CvZ1aeQ729B/6gh20bsMZk9DFoYYiP7Z1gicMr2UzQk8AGRDYvX9dyzhIawn hRSVc2W4SFY3iKWFcLo0AtKSX9SMBZYH5lB7WpxBYlpKhv846LaiU59BSkU/AhrLi9ohnAoV+cQ Br1lfnlt31sAy6oSu6w== X-Authority-Analysis: v=2.4 cv=C4p8WgP+ c=1 sm=1 tr=0 ts=6accdda2 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=eXNsmz249v773VhVZ_gA:9 a=CjuIK1q_8ugA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-ORIG-GUID: rS-SEaYFdYxdin_FCwtsc63raKfIT0UF X-Proofpoint-GUID: rS-SEaYFdYxdin_FCwtsc63raKfIT0UF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-12_04,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 spamscore=0 bulkscore=0 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610120052 On Mon, Sep 21, 2026 at 11:07:11AM +0530, Krishna Chaitanya Chundru wrote: > Add the Nord PCIe controller configuration and the platform-specific > settings required for correct operation. > > Nord requires the NO_SNOOP override and L0s to be disabled. It also > requires a clock-gating-control (CGC) workaround to address a PCIe > power-domain timing-convergence issue. Set the CORE_CLK_CGC_DIS and > AUX_PWR_DET bits in PARF_SYS_CTRL after controller initialization. > The SLV_ACLK_CGC_DIS bit is already configured by hardware reset. > > This behavior is documented in the private QCTDD11972446 erratum, > which is not publicly available. > > Reviewed-by: Konrad Dybcio > Reviewed-by: Shawn Guo > Signed-off-by: Krishna Chaitanya Chundru On Nord Ride and RRD board: Tested-by: Shawn Guo