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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?sHSvqQTBXw61k9KCfXmcQb1Y52vHWoGwiSjkhqGbk9IRRq/cudKtQSix+C2u?= =?us-ascii?Q?mdEaq0nI/P9wkEv3tpxgI2sF1oxbTzcm74uu4dK7YnF8mYIBksWQJ7srVffh?= =?us-ascii?Q?xp6bSXp3IxmQbKPslBsrhB6U0WjJA5uvqL/ogjMLjzOHWzCEYuzP10LeedwJ?= =?us-ascii?Q?//qrF26U1uVirMtpjSWK3PgpEQqfLsBfSvCMr/sh8dAPZsYyp5QpDIM3NLd9?= =?us-ascii?Q?g9zB5jxONLyKhblNGEzfBq+cg5SDKo5YX6mGDINSip0Cnac95TA5cQZWU1O5?= =?us-ascii?Q?tceLDeofEMDfHGB2N28iKMDK/7G2fUdeoYNVIdNG813ZItTzxP+xkkAsaqU4?= =?us-ascii?Q?vg+Ge6bqhpwSZg3UEO4K62PF4725ycwwQEsZwIpUJJ/YBCOXadaDgIiOaSif?= =?us-ascii?Q?POLZqdUJ/8/kyoIOnNFGt50oQvMk7aZgIBELimLFAFBy42SSCvVBd703eNuA?= =?us-ascii?Q?i1ourmU4thCaZEMoV3ebS6ZExgKFPs3+BBJvdcdvx355TBxEp6aEdz5ShvbT?= =?us-ascii?Q?0zesX0jXhdYHnK8T33kGjM/O6sbKQaQysVZAIKTx0KVO2Mf3W3SWwQNfwXug?= =?us-ascii?Q?fGYJGh41kTmUNCmMjYar/A8dpv9zLUXp08bqYlR67afU9/sWZIE/sutr52Nz?= =?us-ascii?Q?1VeyWZQ4ozEwmE4GgjUlBY+oi93IHgKdlZ5DtdCg9a9gqPv9QQbsj4Q6BrXC?= =?us-ascii?Q?v1IVO/rWWWXKSIQOYRhnpWyJ+g1/IZXhDgas5g55NdB2uxRixrZxrlT5RoU5?= =?us-ascii?Q?2E5suAxSdBJPnWTZ3lOqd0Cq2fexvh3WztwvQf5CXhBSEwiamckhI4Py6QG6?= =?us-ascii?Q?/NY01VVNREdjq8S2oaB1f5Pha45fCv0TTGH+9NyEzeezZfxf1hY650CckEGC?= =?us-ascii?Q?V95s43QvbeeZSXDiUbk7ldtDld7aoqdYj4XX7610MsFQOvd4gQf+58CxH2fG?= =?us-ascii?Q?rjuloyVmaHA/GPyBHkStL0EMzkeV5fdG7Ca0/OUokcjuI8OzlWxHj8nxxiQB?= =?us-ascii?Q?dIbLeMtA/AbDb4ANajv17XpWIMX3TJvvHNz6hJ2xFn/artw0xdnNahdrqLc7?= =?us-ascii?Q?CeROGQ8q5AtxS/GIqmTxSsoGGFr/VZd84OZ2VbH/MdA3dd+muMMmKJHGETkm?= =?us-ascii?Q?+PT05LNsWHbU6fQTRYnDKOiXS1R0sCd9wEanQpykVPDhWenwzur+VsJeFrDo?= =?us-ascii?Q?9+U7a8Quj4pPF/JqngSkM7PVpXmIN+zaR3ihgYjVUb4RjHZlxF/esJ6ssAnd?= =?us-ascii?Q?wCkRBHw0ghrJoHb9PgaSeqHcgoXbkN5AnrSZi125GWHMTQSlscUhKneuDhAa?= =?us-ascii?Q?XFdHXh3zGTQXVlwhPI8VIF3L3c8qUr6lv1B4/+X4VGkjd6paQ0pMpa1RGPWJ?= =?us-ascii?Q?w2eUGRD0RtOlq/HgEQqF3l8BSKHHKBF1XSnnflIQpH5R74ckAXm5T79vBeau?= =?us-ascii?Q?COEXKiscpGoWxnJe17PpbJd9vo0AGCCqFjjJ/4BWN1VEe0ENI/Yki9s4AHYh?= =?us-ascii?Q?vmH9ABc0mEqDOiuJ5ntMXB4uVVTlzoMm/7TqD95OVMeaaYcyRI9q21tvQmzK?= =?us-ascii?Q?IMUuqhtcuBZzwRkgke6qwuQbfn59O68QKAa6TIk/EwYWuw1mI/x4zcLMJlAK?= =?us-ascii?Q?QUPBqebqZw1uOUcDUvDpmYa5WTawkeANDz/eX2SEHR56CcQ0U0bKWhjIzPWQ?= =?us-ascii?Q?SkWNe0Xs8oqIBFKxZ4jsaUx8HIBo8/1Ou54v0AP+wgTUm0/NGHMHiZ+naGDR?= =?us-ascii?Q?vcDw4twzOw=3D=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5cc04cd6-f047-4cfb-d82b-08df3344927b X-MS-Exchange-CrossTenant-AuthSource: MI9PR04MB350878.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Oct 2026 09:36:11.8996 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0aDYRvr/mVyI78ygSbbYLMN2z3rhY3OitwyQQliJU7QMf9/56q6rs/fKyspykTFgDto8w1e0EjSt042hY+uRrQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR04MB11707 On Fri, Sep 04, 2026 at 10:32:35AM +0200, Maxime Ripard wrote: > Hi, Hi, Sorry for the late reply. > > On Fri, Sep 04, 2026 at 03:54:57PM +0800, Liu Ying wrote: > > @@ -273,7 +285,22 @@ dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_commit *state) > > dc_ed_pec_sync_trigger(dc_crtc->ed_cont); > > dc_ed_pec_sync_trigger(dc_crtc->ed_safe); > > dc_fg_shdtokgen(dc_crtc->fg); > > + > > + /* Don't relinquish CPU until TCON is set to operation mode. */ > > + local_irq_save(flags); > > + preempt_disable(); > > + > > dc_fg_enable(dc_crtc->fg); > > + /* > > + * Turn TCON into operation mode as soon as the first dumb > > + * frame is generated by DC(we don't relinquish CPU to ensure > > + * this). This makes DPR/PRG be able to evade the frame. > > + */ > > + DC_CRTC_WAIT_FOR_FRAMEGEN_FRAME_INDEX_MOVING(dc_crtc->fg); > > + dc_tc_set_operation_mode(dc_crtc->tc); > > + > > + local_irq_restore(flags); > > + preempt_enable(); > > That's really not great... Can you expand on why you need this, and is > there really no other way to do it? This is a sequence instructed by NXP/Freescale IP designer to ensure that the prefetch engine(DPRC + PRG) can be enabled reliably - TCON must be switched to operation mode from bypass mode as soon as FrameGen finishes generating the first frame(frame index moves). This is the only way to do that, AFAIK. I'll address Sashiko AI bot's comments about local irq disablement in next version. > > Maxime -- Regards, Liu Ying