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Thu, 15 Oct 2026 09:37:26 -0700 (PDT) Received: from oss.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-182a5a2fb99sm116946c88.5.2026.10.15.09.37.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Oct 2026 09:37:25 -0700 (PDT) Date: Thu, 15 Oct 2026 22:07:17 +0530 From: Mohd Ayaan Anwar To: Andrew Lunn Cc: Alex Elder , Lorenzo Bianconi , andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@kernel.org, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hkallweit1@gmail.com, linux@armlinux.org.uk, Daniel Thompson , ansuelsmth@gmail.com, donggeunyoo.kernel@gmail.com, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v2 2/2] net: phy: qcom: qca808x: Add regulator management Message-ID: References: <20261015143849.483339-1-elder@riscstar.com> <20261015143849.483339-3-elder@riscstar.com> <4fc165eb-b57d-41f8-b7b9-c9fe433d866c@riscstar.com> <1af4e7a8-adb9-41bd-8841-61180b284470@lunn.ch> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1af4e7a8-adb9-41bd-8841-61180b284470@lunn.ch> X-Proofpoint-ORIG-GUID: uM0e3pGTFbCXPJNSs6vXDqgf6VwJF2lg X-Authority-Analysis: v=2.4 cv=fNusTpae c=1 sm=1 tr=0 ts=6ad10148 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=XObs8swggq2u4OB2KFAA:9 a=CjuIK1q_8ugA:10 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA2NiBTYWx0ZWRfX1LuBJP03Tehz c7Heom9LUKTnq/X0d/POGmRLhZfT7iAKzqXjjCddPbjH0of6d1GJu3dATDzMluXLhwKm1Bw72dH zWYu9yY5cPBWpueGY6yXpzWy8i64r1mhIQoC1vf9h9DJNtRuR3H2YD3BaDDxBZc10xVhDN7FQRI glfn9MNcOeU8qTcXYx8I1wjLpC/LWPADNv4QA974H2HYyNs0BiTVozAthR4QklADKzNQuDN17PQ EE2t+CC0qGou6IIaSjOca8VUIseVw9VrVHd/gEqfsc0KjaObDj/W4rAg+TOUeootlfavLnJDsQM xo7o0nS0X5xYMJI6PLyLMq0U33Fj+aAc1XGh0jAULtJerZDMZy9g/aPjHD2TwL+PhMUlVFGjGKF X2FBX6f/rxijP611DmyFiFZVRsyKpAee2u3XK2C0MCa9GQ6J4sUHwv328eS0qABWHvHD4HG+iXi A8osbtmxCtEjzaLOs/w== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA2NiBTYWx0ZWRfX0nHPfAvaM5qc qn6/0Zq0A6OWP/W1gpYg6mcglnYw5tf8VzYR0YxFawCNMoBudjxCd5ZhBU/P6Wt6KP06zxZfthd RS4oUoRUuvEvXK/87W9cejJW8ZSCsow= X-Proofpoint-GUID: uM0e3pGTFbCXPJNSs6vXDqgf6VwJF2lg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 clxscore=1015 priorityscore=1501 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150066 On Thu, Oct 15, 2026 at 06:27:01PM +0200, Andrew Lunn wrote: > On Thu, Oct 15, 2026 at 11:01:43AM -0500, Alex Elder wrote: > > On 10/15/26 10:40 AM, Lorenzo Bianconi wrote: > > > > + if (count) > > > > + fsleep(phydev->mdio.reset_assert_delay); > > > nit: should we check reset_assert_delay field is actually set? > > > > Are you saying there should be an alternative delay used > > if it is not set? Do you have a suggestion for what to > > use in that case? > > Does the binding require the value is set? > > What happens it if is 0? I think fsleep() is happy to delay for 0 uS, > but does the hardware still work? Does the datasheet say anything > about power on delays? > I was going to share a text version of the power-up diagram given in this PHY's datasheet. This might help. Power-Up Sequence 1. DVDD asserted | |<-------- 10 ms -------->| (required for external power) | 2. DVDD18 / AVDD18 asserted 3. VDD1P25 asserted | |<-------- 0.2 ms ------->| (required for LDO to settle) | 4. VDD_LDO asserted 5. AVDD asserted | |<--------- 2 ms -------->| (required for XTL to oscillate) | 6. Crystal 50 MHz starts oscillating 7. PAD reset deasserted | |<------- 10 ms --------->| (deglitch time) So, maybe just fsleep(22200) or something a bit higher? Ayaan