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If the capability is absent, the code writes lane > presets at an unrelated configuration offset. > > Look up the capability once before the lane loop and skip the 16 GT/s lane > equivalent control programming when it is absent. > > Fixes: 56e15a238d92 ("PCI: tegra: Add Tegra194 PCIe support") > Signed-off-by: Manikanta Maddireddy > --- Reviewed-by: Frank Li > Changes V1 -> V2: None > > drivers/pci/controller/dwc/pcie-tegra194.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index fb8084cef38b..14031cfaee8b 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -840,7 +840,11 @@ static void tegra_pcie_enable_interrupts(struct dw_pcie_rp *pp) > static void config_gen3_gen4_eq_presets(struct tegra_pcie_dw *pcie) > { > struct dw_pcie *pci = &pcie->pci; > - u32 val, offset, i; > + u32 pl16g, val, i; > + > + pl16g = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_PL_16GT); > + if (pl16g) > + pl16g += PCI_PL_16GT_LE_CTRL; > > /* Program init preset */ > for (i = 0; i < pcie->num_lanes; i++) { > @@ -851,15 +855,15 @@ static void config_gen3_gen4_eq_presets(struct tegra_pcie_dw *pcie) > GEN3_GEN4_EQ_PRESET_INIT); > dw_pcie_writew_dbi(pci, CAP_SPCIE_CAP_OFF + (i * 2), val); > > - offset = dw_pcie_find_ext_capability(pci, > - PCI_EXT_CAP_ID_PL_16GT) + > - PCI_PL_16GT_LE_CTRL; > - val = dw_pcie_readb_dbi(pci, offset + i); > + if (!pl16g) > + continue; > + > + val = dw_pcie_readb_dbi(pci, pl16g + i); > FIELD_MODIFY(PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK, &val, > GEN3_GEN4_EQ_PRESET_INIT); > FIELD_MODIFY(PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK, &val, > GEN3_GEN4_EQ_PRESET_INIT); > - dw_pcie_writeb_dbi(pci, offset + i, val); > + dw_pcie_writeb_dbi(pci, pl16g + i, val); > } > > val = dw_pcie_readl_dbi(pci, GEN3_CTRL); > -- > 2.34.1 >