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From: Albert Esteve <aesteve@redhat.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Sarannya S <quic_sarannya@oss.qualcomm.com>,
	Pranav Mahesh Phansalkar <quic_pphansal@oss.qualcomm.com>,
	Sudeepgoud Patil <quic_sudeepgo@oss.qualcomm.com>
Subject: Re: [PATCH v3 2/4] soc: qcom: smem: validate private entry list walks
Date: Thu, 22 Oct 2026 17:05:21 +0200	[thread overview]
Message-ID: <atomMZYbzh6phIFk@aesteve-thinkpadp1gen8.rmtes.csb> (raw)
In-Reply-To: <CADSE00L+bJoy5AYYB_0PuJE0NEs-_=y20kDUzPkA=sdD=APs+g@mail.gmail.com>

On Thu, Oct 22, 2026 at 10:20:05AM +0200, Albert Esteve wrote:
> On Wed, Oct 21, 2026 at 2:39 PM Konrad Dybcio
> <konrad.dybcio@oss.qualcomm.com> wrote:
> >
> > On 9/24/26 3:10 PM, Albert Esteve wrote:
> > > From: Sarannya S <quic_sarannya@oss.qualcomm.com>
> > >
> > > When walking private entries, use the uncached/cached free offsets as
> > > the list bounds, require room for a header before dereferencing, and
> > > reject a next pointer that does not advance.
> > >
> > > Skip the cached list when the cached free offset is at the partition
> > > end.
> > >
> > > Signed-off-by: Sarannya S <quic_sarannya@oss.qualcomm.com>
> > > Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@oss.qualcomm.com>
> > > Signed-off-by: Sudeepgoud Patil <quic_sudeepgo@oss.qualcomm.com>
> > > Signed-off-by: Albert Esteve <aesteve@redhat.com>
> > > ---
> >
> > [...]
> >
> > > -     while (hdr < end) {
> > > +     while ((hdr + 1) < end) {
> >
> > This will reject a header that's at the tail of the buffer, need
> > to make this <= instead
> 
> Roger. This is a bit hard to read as intuitively I would have thought
> end is the first free byte after the last header, so `(hdr + 1) < end`
> should include it? End uses `offset_free_uncached` which should be
> bigger than `hdr + 1` and it would not miss the tail. But being
> defensive about its value seems like the right call. I will change it.
> 
> >
> > [...]
> >
> > > -     while (e < end) {
> > > +     while ((e + 1) < uncached_end) {
> >
> > Likewise
> >
> > [...]
> >
> > > -             e = cached_entry_next(e, part->cacheline);
> > > +             next_e = cached_entry_next(e, part->cacheline);
> > > +             if (WARN_ON(next_e >= e))
> > > +                     return ERR_PTR(-EINVAL);
> > > +
> > > +             e = next_e;
> > >       }
> > >
> > >       if (WARN_ON((void *)e < (void *)phdr))
> >
> > And LLM thinks should compare against cached_end
> 
> This is preexisting but I think the LLM is right, and it matches the
> theme of the patch. I will change it.

I've sent a new version and Sashiko still complains. Maybe we can just drop the check?

We can continue the conversation in the new version of the series. I wrote here because it had the context.

BR,
Albert

> 
> >
> > Konrad
> >
> 


  reply	other threads:[~2026-10-22 15:05 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 13:10 [PATCH v3 0/4] Add automotive SMEM hardening for Qualcomm platforms Albert Esteve
2026-09-24 13:10 ` [PATCH v3 1/4] soc: qcom: smem: add IN_PARTITION_RANGE helper Albert Esteve
2026-10-21 12:23   ` Konrad Dybcio
2026-10-22  7:33     ` Albert Esteve
2026-09-24 13:10 ` [PATCH v3 2/4] soc: qcom: smem: validate private entry list walks Albert Esteve
2026-10-21 12:39   ` Konrad Dybcio
2026-10-22  8:20     ` Albert Esteve
2026-10-22 15:05       ` Albert Esteve [this message]
2026-09-24 13:10 ` [PATCH v3 3/4] soc: qcom: smem: validate private item payloads Albert Esteve
2026-09-24 13:10 ` [PATCH v3 4/4] soc: qcom: smem: ignore multi remote host partitions Albert Esteve

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