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Fri, 23 Oct 2026 03:27:15 +0000 Date: Fri, 23 Oct 2026 11:27:03 +0800 From: Chao Gao To: Binbin Wu CC: , , , , , , , , , , , , , Subject: Re: [PATCH v5 4/5] KVM: TDX: Report only KVM-allowed CPUIDs in KVM_TDX_CAPABILITIES Message-ID: References: <20261016091422.3182216-1-binbin.wu@linux.intel.com> <20261016091422.3182216-5-binbin.wu@linux.intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20261016091422.3182216-5-binbin.wu@linux.intel.com> X-ClientProxiedBy: KU2P306CA0071.MYSP306.PROD.OUTLOOK.COM (2603:1096:d10:39::14) To IA0PR11MB8380.namprd11.prod.outlook.com (2603:10b6:208:485::21) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA0PR11MB8380:EE_|SJ5PPF20F246184:EE_ X-MS-Office365-Filtering-Correlation-Id: dd4ae791-ecf1-4f06-1d7b-08df30b588b8 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|366016|376014|7416014|1800799024|6133799003|22082099003|18002099003|261022105027099003|261022075727099003|3023799007|4143699003|11063799006|261021121427099003|10067099003|261021123027099003|56012099006; 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The mask combines >feature bits, taken from tdx_cpu_cfg_caps[], with non-feature bits, which >are identified by function, index, and register. > >Treat CPUID.0x1.{EAX,EBX}, CPUID.{0x4,0x18,0x1F}, and CPUID.0x80000008.EAX >as fully allowed, as these registers enumerate non-feature information, >e.g. family/model/stepping, brand index, CLFLUSH line size, APIC ID, >cache/TLB/topology properties, and address sizes. Allow the reserved bits >in them as well. Though there's no architectural guarantee, given what >these registers enumerate, the reserved bits are expected to be used to >extend the existing information rather than to enumerate new features. > >Also allow CPUID.0x24.0.EBX[7:0] (AVX10 version), which the TDX module >reports as directly configurable when AVX10 is supported, even though the >CPUID virtualization table in the "Intel TDX ABI Definitions" currently >lists it as not configurable. The table is expected to be corrected. > >As a result, directly configurable bits that aren't in the allowlist, >including bits introduced by future TDX modules, aren't advertised to >userspace until KVM explicitly opts in. > >Note, the change is user-visible, as some bits that were previously >reported as configurable no longer are. The ABI itself is unchanged: KVM >already filtered unsupported CPUID bits out of KVM_TDX_CAPABILITIES, albeit >via a denylist, and the set of configurable bits already varies with the >TDX module and KVM versions. > >The change isn't expected to break userspace or guests: > - Userspace that honors KVM_TDX_CAPABILITIES simply stops setting the > dropped bits, and KVM_TDX_INIT_VM still succeeds. > - CORE_CAPABILITIES, which older TDX module specs defined as fixed-1, is > still allowed. > - The dropped features are either obsolete or unsupported by KVM, and in > the latter case, a guest relying on them would already have run into > problems. > >Signed-off-by: Binbin Wu Reviewed-by: Chao Gao