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engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-06_05,2026-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 adultscore=0 clxscore=1011 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611060062 On Fri, Nov 06, 2026 at 03:56:10PM +0100, Mieczyslaw Nalewaj wrote: > Subject: Re: [PATCH net-next v7 08/10] net: dsa: realtek: rtl8365mb: re-latch the family D SerDes > > On Fri, Nov 06, 2026 at 03:28:30PM +0100, Alvin Šipraga wrote: > > I don't understand this at all, should it be obvious what you mean by > > "edge" and "latch" here? I would assume you are talking about interrupts > > but it's not clear. > > Sorry, the wording was unclear, and no interrupts are involved. "Edge" > is the SDS_MISC mode field changing from DISABLE to HSGMII, and "latch" > is the SerDes receiver locking onto the incoming signal. It locks on > that change, not on the value, and only if the far end is already > sending. > > > Is the shortcoming/issue you are addressing one of DSA when a SerDes is > > used in the CPU link? Or is it rather some hardware oddity? > > As far as I can tell, a hardware oddity. If the change happens before > the far-end MAC is up, the receiver does not lock and nothing retries. > Both ends then report 2.5Gbps/Full while no frames pass. > > > Can we use interrupts instead of polling? > > I do not know. I have no datasheet, and the vendor API I have does not > expose an interrupt for the SerDes state. > > > I'm basically wondering here if this is not something that DSA or > > phylink could help with? > > pcs_config() and pcs_link_up() run seconds before the far-end MAC > starts, and phylink never calls rtl8365mb_pcs_get_state() for this > port: mb->pcs.poll only arms polling for in-band links, and the CPU > port is a fixed link. The only event I found that tells the driver the > far end is starting is the CPU conduit coming up, reported through > ->conduit_state_change(). OK. Unfortunately I'm a bit out of my depth here, not having worked with SerDes links before. My gut tells me this patch is overkill. I hope somebody else with more experience can chip in. Adding Johan to the mail, as he added SGMII support and might have some opinters. Kind regards, Alvin