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Sat, 07 Nov 2026 00:18:21 -0800 (PST) Received: from buffalo-ssd ([2a09:bac5:45bc:1e1e::300:1a]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ed47528e5dsm11943395ad.4.2026.11.07.00.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Nov 2026 00:18:21 -0800 (PST) Date: Sat, 7 Nov 2026 17:18:17 +0900 From: Akari Tsuyukusa To: Alexander Letuchiy Cc: Roman Vivchar , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6895 Message-ID: References: <20261105222435.571449-1-asalde.le1@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261105222435.571449-1-asalde.le1@gmail.com> Hi Alexander, (Resending with the Cc recipients I missed; sorry for the duplicate.) On Fri, Nov 06, 2026 at 01:24:34AM +0300, Alexander Letuchiy wrote: > On Thu, Nov 5, 2026 at 11:50 PM, Roman Vivchar wrote: > > Does mt6895 actually share the same reset layout as mt6589? Given the > > generation leap between these, the former is very unlikely to use > > the same resets. > > The vendor kernel for this SoC binds the watchdog with the same > compatible list ("mediatek,mt6895-wdt", "mediatek,mt6589-wdt") at the > same address, and its register definitions are identical to mtk_wdt.c. > > The TOPRGU reset layout is the one thing I can't confirm, as I found no > reset table for MT6895 there. This series does not use it: the DT has > no #reset-cells and no consumers. If reset lines are needed later, I > will add a dedicated mt6895_data to the driver. The MT6589 wdt driver now also registers a TOPRGU reset controller: f12d5facded7 ("watchdog: mediatek: Add wdt/toprgu resets for mt6589") The driver now registers a reset controller with 12 reset lines for the "mediatek,mt6589-wdt" compatible, regardless of whether the DT specifies #reset-cells or has any reset consumers. "mediatek,mt6589-wdt" used to be a watchdog-only fallback, since it did not register a TOPRGU reset controller. That is no longer true. Since the MT6895 reset layout is unconfirmed, it must not claim compatibility with the MT6589 TOPRGU reset controller by using "mediatek,mt6589-wdt" as a fallback. The compatible list is part of the Device Tree ABI and cannot be changed later. As I noted in [1], "mediatek,mt6589-wdt" is only a safe fallback where the reset layout is known to match. Many SoCs do not share MT6589's reset layout, and MT6895 gives no reason to be treated as an exception. We should not add yet another MT6589 fallback whose reset layout is not known to be correct. Please give MT6895 its own "mediatek,mt6895-wdt" compatible without "mediatek,mt6589-wdt" fallback. Its TOPRGU reset support can be added once the actual reset layout has been confirmed. [1] https://lore.kernel.org/linux-mediatek/xqnpukvhtezpqhwjnxbqeddiaqlro4m5yjukpplv5mjfxodlfp@ijaf2trst7p4/ Best regards, Akari