From: Frank Li <Frank.li@oss.nxp.com>
To: "Jeff C. Jensen" <kernel@nullptr.com>
Cc: Vinod Koul <vkoul@kernel.org>,
dmaengine@vger.kernel.org, Frank Li <Frank.Li@kernel.org>,
Michal Simek <michal.simek@amd.com>,
Suraj Gupta <suraj.gupta2@amd.com>,
Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>,
Alex Bereza <alex@bereza.email>,
Folker Schwesinger <dev@folker-schwesinger.de>,
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/5] dmaengine: xilinx_dma: Fix cyclic period count truncation
Date: Tue, 27 Oct 2026 12:39:13 -0400 [thread overview]
Message-ID: <auDTsTibC3c_W5B8@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20261022-xilinx-dma-work-v1-2-20faea2e7a80@nullptr.com>
On Thu, Oct 22, 2026 at 03:11:31PM -0700, Jeff C. Jensen wrote:
> xilinx_dma_prep_dma_cyclic() stores buf_len / period_len, a size_t
> quotient, in an unsigned int. On 64-bit builds the count can be
> truncated: a buffer of 2^32 + 1 bytes split into 1-byte periods becomes
> a single period, and the transfer covers one byte of the buffer the
> client asked for.
>
> Compute the quotient as a size_t and reject it if it exceeds
> XILINX_DMA_NUM_DESCS before narrowing it. Each period needs at least one
> hardware descriptor, so a larger count could never be prepared from the
> pool anyway.
>
> Fixes: 92d794dfb699 ("dmaengine: vdma: Add support for cyclic dma mode")
> Assisted-by: Claude:claude-fable-5-1
> Signed-off-by: Jeff C. Jensen <kernel@nullptr.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/dma/xilinx/xilinx_dma.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index 5ccc9f9d58a3..aa714effd10d 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -2454,7 +2454,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic(
> struct xilinx_dma_chan *chan = to_xilinx_chan(dchan);
> struct xilinx_dma_tx_descriptor *desc;
> struct xilinx_axidma_tx_segment *segment, *head_segment, *prev = NULL;
> - size_t copy, sg_used;
> + size_t copy, sg_used, periods;
> unsigned int num_periods;
> int i;
> u32 reg;
> @@ -2462,10 +2462,11 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic(
> if (!period_len)
> return NULL;
>
> - num_periods = buf_len / period_len;
> -
> - if (!num_periods)
> + /* a period takes at least one descriptor */
> + periods = buf_len / period_len;
> + if (!periods || periods > XILINX_DMA_NUM_DESCS)
> return NULL;
> + num_periods = periods;
>
> if (!is_slave_direction(direction))
> return NULL;
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-10-27 16:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-22 22:11 [PATCH 0/5] dmaengine: xilinx_dma: Fix AXI DMA descriptor ring ordering and failed resets Jeff C. Jensen via B4 Relay
2026-10-22 22:11 ` [PATCH 1/5] dmaengine: xilinx_dma: Reject transfers that map no data Jeff C. Jensen via B4 Relay
2026-10-27 16:37 ` Frank Li
2026-10-22 22:11 ` [PATCH 2/5] dmaengine: xilinx_dma: Fix cyclic period count truncation Jeff C. Jensen via B4 Relay
2026-10-27 16:39 ` Frank Li [this message]
2026-10-22 22:11 ` [PATCH 3/5] dmaengine: xilinx_dma: Allocate AXI DMA segments in ring order Jeff C. Jensen via B4 Relay
2026-10-27 19:15 ` Frank Li
2026-10-22 22:11 ` [PATCH 4/5] dmaengine: xilinx_dma: Withhold an AXI DMA engine whose reset did not complete Jeff C. Jensen via B4 Relay
2026-10-27 19:22 ` Frank Li
2026-10-27 20:36 ` Jeff C. Jensen
2026-10-28 15:16 ` Frank Li
2026-10-28 23:38 ` Jeff C. Jensen
2026-10-22 22:11 ` [PATCH 5/5] dmaengine: xilinx_dma: Recover a withheld AXI DMA channel Jeff C. Jensen via B4 Relay
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