From: Sean Christopherson <seanjc@google.com>
To: Jim Mattson <jmattson@google.com>
Cc: Mahmoud Abumandour <ma.mandourr@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/2] KVM: nVMX: Don't let L2's LMSW modify CR0 bits owned by L1
Date: Fri, 30 Oct 2026 11:54:05 -0700 [thread overview]
Message-ID: <auTnzSiIihVgs8ha@google.com> (raw)
In-Reply-To: <CALMp9eS_XAyfRQ0aa7pGmC2t-=mbHA7rngWD9oqOB2U8AJZMsw@mail.gmail.com>
On Fri, Oct 30, 2026, Jim Mattson wrote:
> On Fri, Oct 30, 2026 at 11:51 AM Sean Christopherson <seanjc@google.com> wrote:
> >
> > On Thu, Oct 29, 2026, Mahmoud Abumandour wrote:
> > > When L2's LMSW exits to L0 but not to L1, KVM emulates it with
> > > kvm_lmsw(), which ignores vmcs12's CR0 guest/host mask, so L2 can change
> > > CR0 bits that L1 owns.
> > >
> > > v2:
> > > - Patch 2: order the CR0 store before FNOP and check L2's whole CR0.
> >
> > I'll send a v3, I already spent an absurd amount of time figuring all of this
> > out. I really hate x86 sometimes.
>
> You should redirect that emotion to KVM APIs!
Heh, saying I hate KVM's APIs sometimes would be a lie. I hate them all the time.
prev parent reply other threads:[~2026-10-30 18:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-30 3:29 Mahmoud Abumandour
2026-10-30 3:29 ` [PATCH v2 1/2] " Mahmoud Abumandour
2026-10-30 18:23 ` Sean Christopherson
2026-10-30 18:44 ` Sean Christopherson
2026-10-30 3:29 ` [PATCH v2 2/2] KVM: selftests: Verify that L2's LMSW leaves L1-owned CR0 bits alone Mahmoud Abumandour
2026-10-30 18:41 ` Sean Christopherson
2026-10-30 18:50 ` [PATCH v2 0/2] KVM: nVMX: Don't let L2's LMSW modify CR0 bits owned by L1 Sean Christopherson
2026-10-30 18:52 ` Jim Mattson
2026-10-30 18:54 ` Sean Christopherson [this message]
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