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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a42a61a0csm17598140eec.22.2026.10.31.02.06.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Oct 2026 02:06:57 -0700 (PDT) Date: Sat, 31 Oct 2026 17:06:52 +0800 From: Shawn Guo To: Deepti Jaggi Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shazad Hussain , Nikunj Kela Subject: Re: [PATCH v2 5/7] arm64: dts: qcom: Add device tree for Lemans GearVM variant Message-ID: References: <20261015023711.721837-1-shengchao.guo@oss.qualcomm.com> <20261015023711.721837-6-shengchao.guo@oss.qualcomm.com> <46432502-b2a1-4e7e-b3d9-447a3e239fd5@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <46432502-b2a1-4e7e-b3d9-447a3e239fd5@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: 866zm_D8_ChJpnDb1dUvVrDaNUyek2yw X-Authority-Analysis: v=2.4 cv=Wtq+otfv c=1 sm=1 tr=0 ts=6ae5afb3 cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=yIiWiYsqNO_wyTKnxrMA:9 a=CjuIK1q_8ugA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMxMDAzNiBTYWx0ZWRfX2yJe3PfJzRDH 1LVU7vjxD8p4/36y4JqXSQ6OTuhYf/Krwn0+VGH+3qViSpVFOq4Qfhf5FsX4K4QuY5ifyrbxATk IvjobLEgIf3p0b3tY3QFrI06eqt3JtY= X-Proofpoint-GUID: 866zm_D8_ChJpnDb1dUvVrDaNUyek2yw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMxMDAzNiBTYWx0ZWRfX/42LbVUFc0CH gPL4+e7BEsqCCnBSwqCNFFDDDSTfwqFZ+SqSWZnhjX4OiHX594uz0/wGG2HfZne8yb01bmEWEbi G3koB9dgLAenJdrs5kC0dbTfk11JttjNAwmYyAWsYJqCgqfR1K60fkpFR/A//ZkJm6dF78iLIbm YX9qGaD69xFeZp0rr3oqHcSoDLC5dlLQTXKNM4XjdU9+4ZEXAL/TmNT2RweOtsuEppPrSCOQ1yz D3N5KMU/3gHCnW3kb5y1vnj3gwFCwknTSSTzAcfYPHfJNqi/VzadQ8aKAGqQPWcYYzqKdhYcwLV JYbesc7bKvfRVzrvGMwrxvaNrNBx1wDqVETsvWwTTLrRZpzC7qP+FUGDnk/h6ri7o1Z0QivqIlR 3T9wnqtQckcTJbub6h6oD6bepsyCMXBVWy6mIyun3/HCwNENy2R9j+upZ+pvi+zhhi7gVZVXDZS VS/UnKc30chlhP2i7WQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-31_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 spamscore=0 adultscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2610310036 On Thu, Oct 15, 2026 at 08:15:21PM -0700, Deepti Jaggi wrote: > > > On 10/14/2026 7:37 PM, Shawn Guo wrote: > > Add lemans-gearvm.dtsi for Lemans GearVM variant (SA8255P) that utilizes > > firmware to configure platform resources such as clocks, interconnects > > and TLMM. > > Device drivers request these resources through the SCMI power, reset and > > performance protocols. Assign each device driver a dedicated SCMI > > channel and Tx/Rx doorbells to support parallel resource requests and > > aggregation in the SCMI platform server. Operate the SCMI server stack > > in an SMP-enabled VM using the Qualcomm SMC/HVC transport driver for > > communication. > > > > Group resource operations to improve abstraction and reduce the number of > > SCMI requests. Follow the SCMI-based resource management approach > > demonstrated by Qualcomm at Linaro Connect 2024 [1]. > > > > [1] https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte > > > > Co-developed-by: Shazad Hussain > > Signed-off-by: Shazad Hussain > > Signed-off-by: Nikunj Kela > > Co-developed-by: Deepti Jaggi > > Signed-off-by: Deepti Jaggi > > Signed-off-by: Shawn Guo > > --- > > arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi | 3232 +++++++++++++++++++ > > 1 file changed, 3232 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > > > > diff --git a/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi b/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > > new file mode 100644 > > index 000000000000..4c155cbc7975 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/lemans-gearvm.dtsi > > @@ -0,0 +1,3232 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > > + */ > > + > > +#include "lemans.dtsi" > > + > > +/delete-node/ &xbl_boot_mem; > > +/delete-node/ &pil_adsp_mem; > > +/delete-node/ &q6_adsp_dtb_mem; > > +/delete-node/ &q6_gdsp0_dtb_mem; > > +/delete-node/ &pil_gdsp0_mem; > > +/delete-node/ &pil_gdsp1_mem; > > +/delete-node/ &q6_gdsp1_dtb_mem; > > +/delete-node/ &q6_cdsp0_dtb_mem; > > +/delete-node/ &pil_cdsp0_mem; > > +/delete-node/ &pil_gpu_mem; > > +/delete-node/ &q6_cdsp1_dtb_mem; > > +/delete-node/ &pil_cdsp1_mem; > > +/delete-node/ &pil_cvp_mem; > > +/delete-node/ &pil_video_mem; > > +/delete-node/ &scmi_mem; > > +/delete-node/ &firmware_reserved_mem; > > + > > +/ { > > + clocks { > > + bi_tcxo_div2: bi-tcxo-div2-clk { > > + compatible = "fixed-factor-clock"; > > + clocks = <&xo_board_clk>; > > + clock-mult = <1>; > > + clock-div = <2>; > > + #clock-cells = <0>; > > + }; > > + > > + gpll0_board_clk: gpll0-board-clk { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + }; > > + > > + sleep_clk: sleep-clk { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + }; > > + > > + xo_board_clk: xo-board-clk { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + }; > > + }; > > +}; > > + > > +&adreno_smmu { > > + power-domains = <&scmi15_pd 0>; > > +}; > > + > > +&cpufreq_hw { > > + clocks = <&bi_tcxo_div2>, <&gpll0_board_clk>; > > + clock-names = "xo", "alternate"; > > +}; > > + > > +&firmware { > > + scm { > > + memory-region = <&tz_ffi_mem>; > > + }; > > + > > + scmi0: scmi-0 { > > + compatible = "qcom,scmi-smc"; > > + arm,smc-id = <0xc6008012>; > > + shmem = <&shmem0>; > > + > > As bootloader updates the irq, we can add a comment here. Sure, like what we did on Nord. Shawn