From: Niklas Cassel <cassel@kernel.org>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: mani@kernel.org, kwilczynski@kernel.org,
linux-pci@vger.kernel.org, kishon@kernel.org,
Frank.Li@kernel.org, bhelgaas@google.com, den@valinux.co.jp,
thierry.reding@kernel.org, jonathanh@nvidia.com,
vidyas@nvidia.com, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] PCI: endpoint: Clarify only_64bit for reserved BARs
Date: Mon, 2 Nov 2026 16:12:07 +0100 [thread overview]
Message-ID: <auioRxW-fPSxqECO@ryzen> (raw)
In-Reply-To: <20261102112306.4018464-3-mmaddireddy@nvidia.com>
On Mon, Nov 02, 2026 at 04:53:06PM +0530, Manikanta Maddireddy wrote:
> The only_64bit documentation describes how an EPF driver must configure a
> BAR, but BAR_RESERVED must not be reprogrammed by an EPF driver.
>
> Keep the existing configuration requirement and explain that only_64bit
> also describes the hardware width of a reserved BAR. State explicitly
> that its following BAR register holds the upper 32 bits and cannot be
> used independently.
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
prev parent reply other threads:[~2026-11-02 15:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 11:23 [PATCH v2 0/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search Manikanta Maddireddy
2026-11-02 11:23 ` [PATCH v2 1/2] " Manikanta Maddireddy
2026-11-02 15:12 ` Niklas Cassel
2026-11-02 16:03 ` Frank Li
2026-11-02 11:23 ` [PATCH v2 2/2] PCI: endpoint: Clarify only_64bit for reserved BARs Manikanta Maddireddy
2026-11-02 15:12 ` Niklas Cassel [this message]
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