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Mon, 2 Nov 2026 10:49:24 -0800 Received: from nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.56 via Frontend Transport; Mon, 2 Nov 2026 10:49:22 -0800 Date: Mon, 2 Nov 2026 10:49:20 -0800 From: Nicolin Chen To: "Peng Fan (OSS)" CC: Will Deacon , Robin Murphy , "Jason Gunthorpe" , "Joerg Roedel (AMD)" , "Thierry Reding" , Krishna Reddy , Jonathan Hunter , Jean-Philippe Brucker , , , , , Peng Fan Subject: Re: [PATCH RFC v7 7/7] iommu/arm-smmu-v3: Wire up shared-SID STE ordering and feature gating Message-ID: References: <20261030-smmu-shared-sid-ver7-2026-10-26-v7-0-961726ebd6ab@Example.Com> <20261030-smmu-shared-sid-ver7-2026-10-26-v7-7-961726ebd6ab@Example.Com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20261030-smmu-shared-sid-ver7-2026-10-26-v7-7-961726ebd6ab@Example.Com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00018073:EE_|PH7PR12MB5976:EE_ X-MS-Office365-Filtering-Correlation-Id: 3dbecd4c-fca3-435f-66e8-08df39120f4b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|23010399003|82310400026|376014|7416014|1800799024|261021121427099003|261021135927099003|261022105027099003|261022075727099003|261009223027099003|261026121527099003|261026140227099003|261028144727099003|4143699003|11063799006|10067099003|56012099006|18002099003|261102123227099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: bXJpJ+/odPLWxUFeQhh2kA4eeKpWpzsLQXgcfRhVWsDVAKcDuDLqzg/iRnK7ykdW59vJWkeAl9WUTINSCbL9r4YN2CV3wZEoiBS3Hdw6wyuRH+0s/nwD9RHIzQaMCUn25OBi6O3L+QWbyxzhyjEWFdsu49tqINh+Xub8cp6oO5Q6FOIDrX3FYRACqXqm9EbrtYL+nW9kscd+3uuM7Z2hdw4r3rKiAJwYCUYTkipD7v93OBZuess5Vm546d+q+TTFn2s0BhDG9etSiNTZ3qu0aHAzg3fuAD7cuqFDnBdG8amJ+ZE44UX7JL2PIN5XMxNJOgt6cm3yUHJ3PzBeot8M29TbR1Chgol6xOd30Y5sSgn61J/PBXyj2ggxCXQ+wMiTwYdNeodUPxIfFHPB8BYzzr1bx5qcBB00I1LDKUAU0nCjhkjPoKTZJg56du4XisiW X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2026 18:49:43.6915 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3dbecd4c-fca3-435f-66e8-08df39120f4b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00018073.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5976 On Fri, Oct 30, 2026 at 08:09:39PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > With the per-domain CD table, every non-PASID sharer of a SID builds the > same normal-domain STE: same S1ContextPtr, S1DSS and S1CDMAX. Disable > stall and ATS for shared SIDs as well, so the remaining STE fields are > common too, and let any sharer program the STE. This also handles the > case where one device's driver attaches before the stream owner's driver: > the first attach now installs a valid STE instead of leaving the boot or > firmware STE in place. > > A release or blocked attach must not abort a shared STE while other > sharers remain, otherwise it would break their ongoing DMA. Skip those > writes while the SID is shared; the last master (no longer shared) still > tears the STE down. This also means removing one device from a shared > group no longer leaves the survivors aborted. > > Fault events on shared SIDs cannot be attributed to a specific master, > so arm_smmu_find_master() returns NULL when the stream's shared_masters > list is non-empty. > > Disable SVA, PASID, vSMMU nesting, ATS and IOPF/stall for shared-SID > masters since all of them require an unambiguous SID-to-device mapping. > Reject sharing at insert_master() time if either master has stall enabled, > or if the existing master has PASID or ATS enabled. > > Introduce arm_smmu_master_stall_enabled() to describe the policy actually > programmed into the hardware: a master stalls only if it asked for it and > its StreamID is not shared. Why do we need this? A stall_enabled master shouldn't share its SID in the first place. > Add arm_smmu_is_shared_sid() as an inline helper in arm-smmu-v3.h so that Use arm_smmu_master_shares_sid or arm_smmu_master_has_shared_sid. > arm-smmu-v3-sva.c and arm-smmu-v3-iommufd.c can use it without repeating > the list_empty() pattern. > > Signed-off-by: Peng Fan Please check sashiko findings; all seems valid. https://sashiko.dev/#/patchset/20261030-smmu-shared-sid-ver7-2026-10-26-v7-0-961726ebd6ab%40Example.Com Nicolin