From: Gary Yang <gary.yang@cixtech.com>
To: Jianfeng Liu <Jianfeng.Liu@cixtech.com>
Cc: <cix-kernel-upstream@cixtech.com>,
"Fugang.duan" <fugang.duan@cixtech.com>,
Conor Dooley <conor+dt@kernel.org>,
Hans Zhang <hans.zhang@cixtech.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Peter Chen <peter.chen@cixtech.com>,
Rob Herring <robh@kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: cix: sky1: fix RCSU strap/status reg of pcie_x2_rc node
Date: Tue, 3 Nov 2026 09:59:19 +0800 [thread overview]
Message-ID: <auk_957djGhKflZE@gary-System-Product-Name> (raw)
In-Reply-To: <20260922033448.1094694-1-Jianfeng.Liu@cixtech.com>
Applied, thanks!
On 2026-09-22 11:34, Jianfeng Liu wrote:
> [Some people who received this message don't often get email from jianfeng.liu@cixtech.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> The "rcsu_strap" and "rcsu_status" reg entries of the pcie_x2_rc node
> contain a spurious "0", yielding 9-digit addresses 0x0a0600340 and
> 0x0a0600440 instead of 0x0a060340 and 0x0a060440.
>
> The other Sky1 PCIe controllers use a 0x20 stride within the 0x0a060000
> RCSU block:
>
> pcie_x8_rc: 0x0a060300 / 0x0a060400
> pcie_x2_rc: 0x0a060340 / 0x0a060440 (fixed)
> pcie_x1_0_rc: 0x0a060360 / 0x0a060460
> pcie_x1_1_rc: 0x0a060380 / 0x0a060480
>
> With the typo the driver reads the strap/status registers 0x1000 bytes
> off, landing in the neighbouring controller's RCSU bank. Fix the
> addresses so the correct registers are accessed.
>
> Fixes: 0b014cd8f15e ("arm64: dts: cix: Add PCIe Root Complex on sky1")
> Signed-off-by: Jianfeng Liu <Jianfeng.Liu@cixtech.com>
> Reviewed-by: Fugang.duan <fugang.duan@cixtech.com>
> ---
>
> arch/arm64/boot/dts/cix/sky1.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> index 0a820f45feb9..d64cd935970e 100644
> --- a/arch/arm64/boot/dts/cix/sky1.dtsi
> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> @@ -661,8 +661,8 @@ pcie_x2_rc: pcie@a0c0000 {
> compatible = "cix,sky1-pcie-host";
> reg = <0x00 0x0a0c0000 0x00 0x10000>,
> <0x00 0x26000000 0x00 0x3000000>,
> - <0x00 0x0a0600340 0x00 0x20>,
> - <0x00 0x0a0600440 0x00 0x20>,
> + <0x00 0x0a060340 0x00 0x20>,
> + <0x00 0x0a060440 0x00 0x20>,
> <0x00 0x40000000 0x00 0x00100000>;
> reg-names = "reg", "cfg", "rcsu_strap", "rcsu_status", "msg";
> ranges = <0x01000000 0x0 0x40100000 0x0 0x40100000 0x0 0x00100000>,
> ---
> base-commit: fd73f4a6659897191fa0d40695fe370925dd3780
> branch: fix-mainline-pcie-x2
>
> --
> 2.55.0
>
prev parent reply other threads:[~2026-11-03 1:59 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-22 3:34 Jianfeng Liu
2026-11-03 1:59 ` Gary Yang [this message]
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