From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: James Hilliard <james.hilliard1@gmail.com>
Cc: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Raul E Rangel" <rrangel@chromium.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Heikki Krogerus" <heikki.krogerus@linux.intel.com>,
"Tony Lindgren" <tony@atomide.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Richard Genoud" <richard.genoud@bootlin.com>,
"Nicolas Ferre" <nicolas.ferre@microchip.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Claudiu Beznea" <claudiu.beznea@tuxon.dev>,
"Jacky Huang" <ychuang3@nuvoton.com>,
"Shan-Chun Hung" <schung@nuvoton.com>,
"Pali Rohár" <pali@kernel.org>, "Frank Li" <Frank.Li@nxp.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Maciej W. Rozycki" <macro@orcam.me.uk>,
"Timur Tabi" <timur@kernel.org>,
"Peter Ujfalusi" <peter.ujfalusi@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Patrice Chotard" <patrice.chotard@foss.st.com>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v9 5/8] serial: core: allow drivers to reserve flushed transmit storage
Date: Tue, 3 Nov 2026 19:08:49 +0200 [thread overview]
Message-ID: <auoVIR05PNyU8EEt@ashevche-desk.local> (raw)
In-Reply-To: <20261102-submit-serial-8250-dma-cancel-v1-v9-5-9159caade148@gmail.com>
On Mon, Nov 02, 2026 at 04:14:32PM -0700, James Hilliard wrote:
> uart_flush_buffer() resets the transmit FIFO before calling the driver's
> flush callback. An asynchronous DMA transfer can still access that storage
> after the callback returns, while a new write can immediately reuse it.
>
> Add uart_xmit_block() and uart_xmit_unblock() so a driver can reserve the
> flushed storage until its transfer and completion callbacks have retired.
> Serialize the reservation with FIFO producers using the port lock.
>
> While the storage is reserved, write_room() reports no space and write()
> and put_char() accept no data. Defer write-ready notifications until the
> reservation is released, preserving one-shot TTY wakeups. Keep the flush's
> write-ready notification under the port lock so it cannot race another
> reservation.
>
> Wake tty->write_wait after flushing even when writes remain blocked.
> tty_wait_until_sent() waits for the logical FIFO to empty, independently
> of whether its storage can be reused. Notify these drain waiters without
> invoking the line discipline's write_wakeup() callback, so a reservation
> does not prevent a completed logical flush from waking a drain waiter or
> consume a one-shot write-ready notification prematurely.
>
> Suppress ordinary TX starts while the FIFO storage is blocked. Preserve
> high-priority flow-control characters, which use separate storage.
> Releasing the reservation wakes writers through the existing TTY wakeup
> path. This preserves immediate logical flushing while applying write
> backpressure until the storage is reusable.
>
> Track port readiness separately from DMA ownership. Retirement releases the
> reservation even during startup or shutdown, while writes and wakeups stay
> gated until successful startup or resume. Reopening or restarting a port
> wakes deferred writers with either a new or retained FIFO. Restart queued
> output when reusing a FIFO after suspension. Keep its write-ready
> notification pending until the retained output drains below the normal
> wakeup threshold.
>
> Publish resume readiness under the same port lock as the TX restart,
> without clearing any reservation. A concurrent flush can then reserve a
> new transfer without resume releasing its storage prematurely.
>
> Assert the port-lock requirement at uart_write_wakeup(), alongside the
> reservation helpers, so callers cannot inspect readiness or release a
> one-shot notification concurrently with a reservation change.
...
> + /* Retained output must drain before consuming a write-ready notification. */
> + if (kfifo_len(&state->port.xmit_fifo) < WAKEUP_CHARS)
> + uart_write_wakeup(port);
I believe I have seen this already a few times. Perhaps a helper with
documented idea behind it?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-11-03 17:08 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 23:14 [PATCH v9 0/8] serial: 8250: serialize DMA cancellation with buffer reuse James Hilliard
2026-11-02 23:14 ` [PATCH v9 1/8] serial: 8250_omap: separate locked TX DMA completion processing James Hilliard
2026-11-03 16:10 ` Raul E Rangel
2026-11-02 23:14 ` [PATCH v9 2/8] serial: serialize asynchronous write wakeups with the port lock James Hilliard
2026-11-03 16:10 ` Raul E Rangel
2026-11-03 17:06 ` Andy Shevchenko
2026-11-03 20:25 ` Maciej W. Rozycki
2026-11-02 23:14 ` [PATCH v9 3/8] serial: 8250_omap: serialize RX DMA completion and flushing James Hilliard
2026-11-03 11:55 ` Ilpo Järvinen
2026-11-03 16:10 ` Raul E Rangel
2026-11-02 23:14 ` [PATCH v9 4/8] serial: 8250_omap: quiesce DMA IRQ handling before shutdown James Hilliard
2026-11-03 16:11 ` Raul E Rangel
2026-11-02 23:14 ` [PATCH v9 5/8] serial: core: allow drivers to reserve flushed transmit storage James Hilliard
2026-11-03 16:11 ` Raul E Rangel
2026-11-03 17:08 ` Andy Shevchenko [this message]
2026-11-02 23:14 ` [PATCH v9 6/8] serial: 8250: drain canceled TX DMA before reusing its buffer James Hilliard
2026-11-03 16:11 ` Raul E Rangel
2026-11-03 17:21 ` Andy Shevchenko
2026-11-02 23:14 ` [PATCH v9 7/8] serial: 8250: retire canceled RX DMA before reusing the receive buffer James Hilliard
2026-11-03 16:11 ` Raul E Rangel
2026-11-03 18:05 ` James Hilliard
2026-11-03 17:33 ` Andy Shevchenko
2026-11-03 17:54 ` James Hilliard
2026-11-03 18:06 ` Andy Shevchenko
2026-11-03 18:16 ` James Hilliard
2026-11-03 20:59 ` Andy Shevchenko
2026-11-02 23:14 ` [PATCH v9 8/8] serial: 8250: retain DMA resources when termination fails James Hilliard
2026-11-03 16:11 ` Raul E Rangel
2026-11-03 17:35 ` Andy Shevchenko
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