Re: [PATCH 3/4] dmaengine: ti: cppi41: Restore QMGR_MEMCTRL in resume

[Frank Li <Frank.li@oss.nxp.com>]

On Tue, Nov 03, 2026 at 08:37:30PM +0100, Markus Schneider-Pargmann (TI) wrote:
> [You don't often get email from msp@baylibre.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Currently only QMGR_MEMBASE is restored in resume, QMGR_MEMCTRL is left
> at its default values.
>
> Add a restore for QMGR_MEMCTRL. This introduces a helper function
> cppi41_memctrl() to not duplicate this calcuation in init and resume.
>
> Fixes: f97b98d6d02e ("dma: cppi41: add support for suspend and resume")
> Cc: stable@vger.kernel.org
> Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/dma/ti/cppi41.c | 27 +++++++++++++++------------
>  1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/dma/ti/cppi41.c b/drivers/dma/ti/cppi41.c
> index f5a824418fe7..e2a089066c6d 100644
> --- a/drivers/dma/ti/cppi41.c
> +++ b/drivers/dma/ti/cppi41.c
> @@ -842,13 +842,22 @@ static void deinit_cppi41(struct device *dev, struct cppi41_dd *cdd)
>                         cdd->scratch_phys);
>  }
>
> +static u32 cppi41_memctrl(int area)
> +{
> +       u32 reg;
> +
> +       reg = (area * ALLOC_DECS_NUM) << QMGR_MEMCTRL_IDX_SH;
> +       reg |= (ilog2(sizeof(struct cppi41_desc)) - 5) << QMGR_MEMCTRL_DESC_SH;
> +       reg |= ilog2(ALLOC_DECS_NUM) - 5;
> +
> +       return reg;
> +}
> +
>  static int init_descs(struct device *dev, struct cppi41_dd *cdd)
>  {
>         unsigned int desc_size;
>         unsigned int mem_decs;
>         int i;
> -       u32 reg;
> -       u32 idx;
>
>         BUILD_BUG_ON(sizeof(struct cppi41_desc) &
>                         (sizeof(struct cppi41_desc) - 1));
> @@ -858,13 +867,7 @@ static int init_descs(struct device *dev, struct cppi41_dd *cdd)
>         desc_size = sizeof(struct cppi41_desc);
>         mem_decs = ALLOC_DECS_NUM * desc_size;
>
> -       idx = 0;
>         for (i = 0; i < DESCS_AREAS; i++) {
> -
> -               reg = idx << QMGR_MEMCTRL_IDX_SH;
> -               reg |= (ilog2(desc_size) - 5) << QMGR_MEMCTRL_DESC_SH;
> -               reg |= ilog2(ALLOC_DECS_NUM) - 5;
> -
>                 BUILD_BUG_ON(DESCS_AREAS != 1);
>                 cdd->cd = dma_alloc_coherent(dev, mem_decs,
>                                 &cdd->descs_phys, GFP_KERNEL);
> @@ -872,9 +875,7 @@ static int init_descs(struct device *dev, struct cppi41_dd *cdd)
>                         return -ENOMEM;
>
>                 cppi_writel(cdd->descs_phys, cdd->qmgr_mem + QMGR_MEMBASE(i));
> -               cppi_writel(reg, cdd->qmgr_mem + QMGR_MEMCTRL(i));
> -
> -               idx += ALLOC_DECS_NUM;
> +               cppi_writel(cppi41_memctrl(i), cdd->qmgr_mem + QMGR_MEMCTRL(i));
>         }
>         return 0;
>  }
> @@ -1191,8 +1192,10 @@ static int __maybe_unused cppi41_resume(struct device *dev)
>         if (pm_runtime_status_suspended(dev))
>                 return 0;
>
> -       for (i = 0; i < DESCS_AREAS; i++)
> +       for (i = 0; i < DESCS_AREAS; i++) {
>                 cppi_writel(cdd->descs_phys, cdd->qmgr_mem + QMGR_MEMBASE(i));
> +               cppi_writel(cppi41_memctrl(i), cdd->qmgr_mem + QMGR_MEMCTRL(i));
> +       }
>
>         list_for_each_entry(c, &cdd->ddev.channels, chan.device_node)
>                 if (!c->is_tx)
>
> --
> 2.55.0
>