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From: Frank Li <Frank.li@oss.nxp.com>
To: James Hilliard <james.hilliard1@gmail.com>
Cc: "Viresh Kumar" <vireshk@kernel.org>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Vinod Koul" <vkoul@kernel.org>, "Frank Li" <Frank.Li@kernel.org>,
	"Dan Williams" <djbw@kernel.org>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	dmaengine@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-kernel@vger.kernel.org, Sashiko <sashiko-bot@kernel.org>,
	"Lars-Peter Clausen" <lars@metafoo.de>
Subject: Re: [PATCH v6 06/10] dmaengine: dw: simplify transfer-complete handling
Date: Wed, 4 Nov 2026 14:27:40 -0600	[thread overview]
Message-ID: <auuVPDkHrggJ37zL@SMW015318> (raw)
In-Reply-To: <20261103-submit-dw-dma-synchronize-v1-v6-6-2ee0c348224d@gmail.com>

On Tue, Nov 03, 2026 at 03:26:08PM -0700, James Hilliard wrote:
> With hardware-LLP residue handled by the status getter, the descriptor
> scanner only needs to process transfer-complete events. Return through a
> common unlock path when no event or active descriptor remains, and flatten
> the completion handling.
>
> Only one transaction is active on a channel. Detach that descriptor before
> starting the next queued transfer, keeping cookie completion under the
> channel lock and client notification outside it. Preserve software-LLP
> block advancement before completing the transaction.
>
> Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/dma/dw/core.c | 92 +++++++++++++++++++++------------------------------
>  1 file changed, 38 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
> index d9127337c849..3cc8579f8829 100644
> --- a/drivers/dma/dw/core.c
> +++ b/drivers/dma/dw/core.c
> @@ -297,74 +297,58 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
>  {
>  	struct dw_desc *desc, *_desc;
>  	struct dw_desc *child;
> -	u32 status_xfer;
>  	unsigned long flags;
>  	LIST_HEAD(list);
>
>  	spin_lock_irqsave(&dwc->lock, flags);
> -	status_xfer = dma_readl(dw, RAW.XFER);
> -
> -	if (status_xfer & dwc->mask) {
> -		/* Everything we've submitted is done */
> -		dma_writel(dw, CLEAR.XFER, dwc->mask);
> -		if (list_empty(&dwc->active_list)) {
> -			spin_unlock_irqrestore(&dwc->lock, flags);
> -			return;
> -		}
> -
> -		if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
> -			struct list_head *head, *active = dwc->tx_node_active;
> -
> -			/*
> -			 * We are inside first active descriptor.
> -			 * Otherwise something is really wrong.
> -			 */
> -			desc = dwc_first_active(dwc);
> -
> -			head = &desc->tx_list;
> -			if (active != head) {
> -				/* Update residue to reflect last sent descriptor */
> -				if (active == head->next)
> -					desc->residue -= desc->len;
> -				else
> -					desc->residue -= to_dw_desc(active->prev)->len;
>
> -				child = to_dw_desc(active);
> -
> -				/* Submit next block */
> -				dwc_do_single_block(dwc, child);
> +	if (!(dma_readl(dw, RAW.XFER) & dwc->mask))
> +		goto unlock;
>
> -				spin_unlock_irqrestore(&dwc->lock, flags);
> -				return;
> -			}
> +	dma_writel(dw, CLEAR.XFER, dwc->mask);
> +	if (list_empty(&dwc->active_list))
> +		goto unlock;
>
> -			/* We are done here */
> -			clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
> +	desc = dwc_first_active(dwc);
> +	if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
> +		struct list_head *head = &desc->tx_list;
> +		struct list_head *active = dwc->tx_node_active;
> +
> +		if (active != head) {
> +			/* Update residue to reflect last sent descriptor. */
> +			if (active == head->next)
> +				desc->residue -= desc->len;
> +			else
> +				desc->residue -= to_dw_desc(active->prev)->len;
> +
> +			child = to_dw_desc(active);
> +
> +			/* Submit next block, including for polled transfers. */
> +			dwc_do_single_block(dwc, child);
> +			goto unlock;
>  		}
>
> -		if (dma_readl(dw, CH_EN) & dwc->mask) {
> -			dev_err(dmaengine_chan_dev(&dwc->chan),
> -				"BUG: XFER bit set, but channel not idle!\n");
> -
> -			/* Try to continue after resetting the channel... */
> -			dwc_chan_disable(dw, dwc);
> -		}
> +		clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
> +	}
>
> -		/* Detach the completed transfer before starting queued work. */
> -		list_splice_init(&dwc->active_list, &list);
> -		list_for_each_entry(desc, &list, desc_node)
> -			dma_cookie_complete(&desc->txd);
> -		dwc_dostart_first_queued(dwc);
> -		spin_unlock_irqrestore(&dwc->lock, flags);
> +	if (dma_readl(dw, CH_EN) & dwc->mask) {
> +		dev_err(dmaengine_chan_dev(&dwc->chan),
> +			"BUG: XFER bit set, but channel not idle!\n");
>
> -		list_for_each_entry_safe(desc, _desc, &list, desc_node) {
> -			list_del_init(&desc->desc_node);
> -			dwc_descriptor_free(dwc, desc, true);
> -		}
> -		return;
> +		/* Try to continue after resetting the channel... */
> +		dwc_chan_disable(dw, dwc);
>  	}
>
> +	dma_cookie_complete(&desc->txd);
> +	list_move_tail(&desc->desc_node, &list);
> +	dwc_dostart_first_queued(dwc);
> +unlock:
>  	spin_unlock_irqrestore(&dwc->lock, flags);
> +
> +	list_for_each_entry_safe(desc, _desc, &list, desc_node) {
> +		list_del_init(&desc->desc_node);
> +		dwc_descriptor_free(dwc, desc, true);
> +	}
>  }
>
>  static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_desc *desc)
>
> --
> 2.53.0
>

  reply	other threads:[~2026-11-04 20:27 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 22:26 [PATCH v6 00/10] dmaengine: dw: serialize completion and termination James Hilliard
2026-11-03 22:26 ` [PATCH v6 01/10] dmaengine: dw: Fix XFER bit set, but channel not idle error James Hilliard
2026-11-03 22:26 ` [PATCH v6 02/10] dmaengine: dw: serialize error recovery with channel termination James Hilliard
2026-11-03 22:26 ` [PATCH v6 03/10] dmaengine: dw: complete cookies before releasing the channel lock James Hilliard
2026-11-03 22:26 ` [PATCH v6 04/10] dmaengine: dw: extract hardware-LLP residue calculation James Hilliard
2026-11-04 20:07   ` Frank Li
2026-11-03 22:26 ` [PATCH v6 05/10] dmaengine: dw: calculate residue in the status getter James Hilliard
2026-11-04 20:21   ` Frank Li
2026-11-03 22:26 ` [PATCH v6 06/10] dmaengine: dw: simplify transfer-complete handling James Hilliard
2026-11-04 20:27   ` Frank Li [this message]
2026-11-03 22:26 ` [PATCH v6 07/10] dmaengine: dw: report residue for queued transfers James Hilliard
2026-11-03 22:26 ` [PATCH v6 08/10] dmaengine: dw: drain the tasklet before releasing channel resources James Hilliard
2026-11-03 22:26 ` [PATCH v6 09/10] dmaengine: dw: synchronize completion callbacks James Hilliard
2026-11-03 22:26 ` [PATCH v6 10/10] dmaengine: dw: Prevent tx-status calling DMA-desc callback James Hilliard

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