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Wysocki" , , , , , , , , , , , , , , , , , Danny Gonzalez Subject: Re: [PATCH v8 5/5] PCI: Suspend iommu function prior to resetting a device Message-ID: References: <20261105001333.GA1478880@bhelgaas> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20261105001333.GA1478880@bhelgaas> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN6PEPF00000070:EE_|SN7PR12MB6671:EE_ X-MS-Office365-Filtering-Correlation-Id: 3013f8e3-1783-491c-45a2-08df3ad9f471 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|23010399003|1800799024|82310400026|376014|7416014|261022075727099003|261022105027099003|261021121427099003|261021135927099003|261026140227099003|261026121527099003|261028144727099003|261102123227099003|4143699003|11063799006|56012099006|10067099003|260925021311599003|260925021911599003|18002099003|22082099003|261009223027099003|6133799003|260925022911599003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: lvx8WWDsdT/k+dpo7nnJdrK2wXlEU3lWWwgafbJ6Q0H0sNXWy8RC4HI1ufac2VuX11IjqY+aMdN2IbfyUJV8Y2OH6WaIAmUSzbNF9Z0WFw98OVppGj9dyy8vdDj+rmeH8h6e06eegfmtO4nhfmQD1F/lHljR1u5zcktXhEpGIii0oZBwgwtX/jzz/8m9qodsygKnry7mbQJZqTlqpkAaNqmiMGThLfkF0m9lWo4HNMMS86E2erR7Zwh7ryLV8cdEYhjdWnR/1AkH675AXqT2LmGHZGISMA5y95tkfLykAq4945ZA1O1LAYxj+fR5wPVD6m/AP8yCy2UnaKoZ6jMBGOhPGXVnvBgycmZ3Pre0f9drcadShh9pjc3mdHbnktv+jiTodyDw7YZJRyAmv/kOz6ewsOmwtnabyes0T195rBjY/tXD3qCH3/wos+wDQZdd X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2026 01:13:09.1514 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3013f8e3-1783-491c-45a2-08df3ad9f471 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN6PEPF00000070.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6671 On Wed, Nov 04, 2026 at 06:13:33PM -0600, Bjorn Helgaas wrote: > On Wed, Nov 04, 2026 at 04:03:22PM -0800, Nicolin Chen wrote: > > On Wed, Nov 04, 2026 at 05:55:00PM -0600, Bjorn Helgaas wrote: > > > On Mon, Dec 15, 2025 at 01:42:20PM -0800, Nicolin Chen wrote: > > > > @@ -4885,10 +4919,20 @@ static int pci_reset_bus_function(struct pci_dev *dev, bool probe) > > > > return -ENOTTY; > > > > } > > > > > > > > + rc = pci_dev_reset_iommu_prepare(dev); > > > > + if (rc) { > > > > + pci_err(dev, "failed to stop IOMMU for a PCI reset: %d\n", rc); > > > > + return rc; > > > > + } > > > > > > Unlike the other reset functions, this one calls > > > pci_dev_reset_iommu_prepare() even when probe==true, i.e., we don't > > > want to actually perform the reset, we just want to know whether the > > > reset method might work. > > > > > > It's at least unnecessary to call pci_dev_reset_iommu_prepare() and > > > pci_dev_reset_iommu_done() in that case, and maybe even problematic > > > because the pci_init_reset_methods() probe happens from > > > pci_init_capabilities(), which is pretty early during PCI enumeration > > > of the device. > > > > > > I know this has already been merged as f5b16b802174 ("PCI: Suspend > > > iommu function prior to resetting a device"), and I'm not sure whether > > > we should do anything about it. I wonder if we should just skip the > > > prepare/done when probe==true? > > > > I've posted a fix for a few times actually. The latest one was > > posted yesterday after a split: > > https://lore.kernel.org/linux-iommu/c66d5221a8e4356316d4f614c8584a80dc9d71b6.1793729707.git.nicolinc@nvidia.com/ > > Well, that's embarrassing ;) > > I acked the PCI patches there on the assumption that they'll go via > the IOMMU tree since the interesting bits are there. Thanks! The acks are in time. Nicolin