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Wysocki" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 01/10] irqchip/gic-v5: Reject SPIs not backed by an IRS Message-ID: References: <20261104-host_gicv5_fixes-v2-0-e47ad20ea3c8@arm.com> <20261104-host_gicv5_fixes-v2-1-e47ad20ea3c8@arm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261104-host_gicv5_fixes-v2-1-e47ad20ea3c8@arm.com> On Wed, Nov 04, 2026 at 05:47:55PM +0000, Sascha Bischoff wrote: > It is possible to build a multi-IRS GICv5 system where there are gaps > in the global SPI range that are not backed by any IRS. In the current > incarnation, this results in dereferencing a null pointer. > > Reject cases where the firmware attempts to use those SPIs during IRQ > allocation by catching the case where there is no chip_data associated > with the irq (meaning that there is no IRS to back it). Spit out a > warning about broken firmware when this is encountered as it shouldn't > be using non-existent SPIs in the first place. > > Fixes: 5cb1b6dab2def ("irqchip/gic-v5: Add GICv5 IRS/SPI support") > Acked-by: Lorenzo Pieralisi > Signed-off-by: Sascha Bischoff https://docs.kernel.org/process/maintainer-tip.html "Ordering of commit tags", if there is a v3. Lorenzo > --- > drivers/irqchip/irq-gic-v5.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c > index 8c0303af71e7d..f3cce2bd28cc3 100644 > --- a/drivers/irqchip/irq-gic-v5.c > +++ b/drivers/irqchip/irq-gic-v5.c > @@ -727,6 +727,15 @@ static int gicv5_irq_spi_domain_alloc(struct irq_domain *domain, unsigned int vi > > irqd = irq_desc_get_irq_data(irq_to_desc(virq)); > chip_data = gicv5_irs_lookup_by_spi_id(hwirq); > + /* > + * The global SPI range may contain IDs not covered by any IRS, i.e., it > + * may have gaps, in which case there is no IRS to back the SPI. Catch > + * broken firmware trying to use any of those SPIs. > + */ > + if (!chip_data) { > + pr_warn("Firmware bug! Unimplemented SPI (0x%lx)!\n", hwirq); > + return -EINVAL; > + } > > irq_domain_set_info(domain, virq, hwirq, &gicv5_spi_irq_chip, chip_data, > handle_fasteoi_irq, NULL, NULL); > > -- > 2.34.1 >