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Tue, 10 Nov 2026 11:25:14 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id fZNmIhr/8mpCZQAAD6G6ig (envelope-from ); Tue, 10 Nov 2026 11:25:14 +0000 Date: Tue, 10 Nov 2026 11:25:13 +0000 From: Pedro Falcato To: Seunghyun An Cc: linux-mm@kvack.org, Andrew Morton , Lorenzo Stoakes , David Hildenbrand , Vlastimil Babka , "Liam R . Howlett" , Jann Horn , Matthew Wilcox , Jan Kara , Dave Hansen , Suren Baghdasaryan , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org Subject: Re: [PATCH 1/2] mm/rmap: use vm_pgoff for anonymous VMAs in linear_anon_page_index() Message-ID: References: <20261110000002.1834454-1-san55@wisc.edu> <20261110000002.1834454-2-san55@wisc.edu> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261110000002.1834454-2-san55@wisc.edu> X-Spamd-Result: default: False [-13.51 / 50.00]; SUSE_INTERNAL_BYPASS(-9.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCPT_COUNT_TWELVE(0.00)[14]; MISSING_XM_UA(0.00)[]; ARC_NA(0.00)[]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; DKIM_TRACE(0.00)[suse.de:+] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -13.51 X-Spam-Level: X-Rspamd-Queue-Id: E399C1F7D9 On Mon, Nov 09, 2026 at 06:00:01PM -0600, Seunghyun An wrote: > __vm_anon_pgoff_hi sits right after vm_refcnt in the vm_refcnt > cacheline. Since commit 93c0c8dc87f6 ("mm/rmap: use anon pgoff to track > MAP_PRIVATE file-backed anon folios"), which made anon rmap use it, > __folio_set_anon() reads it on every new anonymous folio, i.e. once per > fault that maps a new anonymous page, between vma_start_read() and > vma_end_read(). > > When several threads fault on the same VMA, the other CPUs keep writing > vm_refcnt from vma_start_read()/vma_end_read(), so this read often > misses and pulls the line over. The extra load can force a coherence > transfer and makes the following vm_refcnt updates more expensive. > > For anonymous VMAs the anonymous page offset is always equal to vm_pgoff > (linear_anon_page_index() already asserts this under CONFIG_DEBUG_VM; > it holds for MAP_PRIVATE /dev/zero too since commit e59c9a971a9f > ("mm/vma: make MAP_PRIVATE-mapped /dev/zero mappings truly anonymous")), > so compute the index from vm_pgoff as before. That brings back the > pre-series behaviour for the hot path; MAP_PRIVATE file-backed VMAs still > read the split field. Keep the assertion, the other way round. > > Moving __vm_anon_pgoff_hi out of the line does not work without growing > vm_area_struct. With e.g. CONFIG_ANON_VMA_NAME=y the struct is exactly > 192 bytes, cachelines 0 and 1 have no hole, and the only 4-byte fields > that could fill the slot next to vm_refcnt are vm_lock_seq and the lo/hi > halves. vm_lock_seq is read before vm_refcnt is taken in vma_start_read(), > so it would just move the miss. > I trust Lorenzo knows more about his plans to use anon_pgoff than I do, so I'll let him reply. A comment though: > Measured on an AMD EPYC 9634 (84 cores, 12 CCDs, CONFIG_DEBUG_VM=n), on > mainline after v7.4-rc1 (the base of this series). Threads share one > anonymous VMA, each faults its own slice and zaps it with MADV_DONTNEED; > faults/s, median of 3: > > CPUs base patched > 1 CCD, 7 threads 2.360M 2.369M +0.4% > 7 CCDs, 1 thread each 1.738M 1.982M +14.0% This is not particularly surprising. CCDs have their own L3 cache. I'm not surprised the coherency penalty is much higher cross-CCD. -- Pedro