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Tue, 10 Nov 2026 06:38:23 -0800 (PST) Received: from p14s ([2604:3d09:148c:c800:a917:5683:7f92:9eda]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b1690eb517sm1867517a91.4.2026.11.10.06.38.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2026 06:38:23 -0800 (PST) Date: Tue, 10 Nov 2026 08:38:21 -0600 From: Mathieu Poirier To: "Rob Herring (Arm)" Cc: Bjorn Andersson , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Nishanth Menon , linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dt-bindings: reset: Convert the ti,syscon-reset binding to DT schema Message-ID: References: <20261109173112.4111810-1-robh@kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261109173112.4111810-1-robh@kernel.org> On Mon, Nov 09, 2026 at 11:31:11AM -0600, Rob Herring (Arm) wrote: > Convert the ti,syscon-reset binding to DT schema format. It's a straight > forward conversion. > > Signed-off-by: Rob Herring (Arm) > --- > .../bindings/remoteproc/ti,keystone-rproc.txt | 2 +- > .../bindings/reset/ti,syscon-reset.yaml | 58 ++++++++++++ > .../bindings/reset/ti-syscon-reset.txt | 91 ------------------- > 3 files changed, 59 insertions(+), 92 deletions(-) > create mode 100644 Documentation/devicetree/bindings/reset/ti,syscon-reset.yaml > delete mode 100644 Documentation/devicetree/bindings/reset/ti-syscon-reset.txt Applied. Thanks, Mathieu > > diff --git a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt > index 847552133633..94f4508c8b0c 100644 > --- a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt > +++ b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt > @@ -46,7 +46,7 @@ The following are the mandatory properties: > managing the resets for this device, and a reset > specifier. Please refer to either of the following reset > bindings for the reset argument specifier as per SoC, > - Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > + Documentation/devicetree/bindings/reset/ti,syscon-reset.yaml > for 66AK2HK/66AK2L/66AK2E SoCs or, > Documentation/devicetree/bindings/reset/ti,sci-reset.yaml > for 66AK2G SoCs > diff --git a/Documentation/devicetree/bindings/reset/ti,syscon-reset.yaml b/Documentation/devicetree/bindings/reset/ti,syscon-reset.yaml > new file mode 100644 > index 000000000000..1cbb2bf88716 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/ti,syscon-reset.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/ti,syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: TI Syscon Reset Controller > + > +maintainers: > + - Nishanth Menon > + > +description: > + Reset controller implemented by registers in the parent syscon. > + > +properties: > + compatible: > + oneOf: > + - const: ti,syscon-reset > + - items: > + - enum: > + - ti,k2e-pscrst > + - ti,k2l-pscrst > + - ti,k2hk-pscrst > + - const: ti,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + ti,reset-bits: > + description: > > + Seven cells per reset, indexed by the reset specifier: > + > + Cell #1 : offset of the reset assert control register > + Cell #2 : bit position of the reset in the reset assert control register > + Cell #3 : offset of the reset deassert control register > + Cell #4 : bit position of the reset in the reset deassert control register > + Cell #5 : offset of the reset status register > + Cell #6 : bit position of the reset in the reset status register > + Cell #7 : Flags used to control reset behavior, available flags defined > + in the DT include file > + > +required: > + - compatible > + - '#reset-cells' > + - ti,reset-bits > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + reset-controller { > + compatible = "ti,k2e-pscrst", "ti,syscon-reset"; > + #reset-cells = <1>; > + ti,reset-bits = <0xa3c 8 0xa3c 8 0x83c 8 > + (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR)>; > + }; > diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > deleted file mode 100644 > index 61a0ff33e89f..000000000000 > --- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > +++ /dev/null > @@ -1,91 +0,0 @@ > -TI SysCon Reset Controller > -======================= > - > -Almost all SoCs have hardware modules that require reset control in addition > -to clock and power control for their functionality. The reset control is > -typically provided by means of memory-mapped I/O registers. These registers are > -sometimes a part of a larger register space region implementing various > -functionalities. This register range is best represented as a syscon node to > -allow multiple entities to access their relevant registers in the common > -register space. > - > -A SysCon Reset Controller node defines a device that uses a syscon node > -and provides reset management functionality for various hardware modules > -present on the SoC. > - > -SysCon Reset Controller Node > -============================ > -Each of the reset provider/controller nodes should be a child of a syscon > -node and have the following properties. > - > -Required properties: > --------------------- > - - compatible : Should be, > - "ti,k2e-pscrst" > - "ti,k2l-pscrst" > - "ti,k2hk-pscrst" > - "ti,syscon-reset" > - - #reset-cells : Should be 1. Please see the reset consumer node below > - for usage details > - - ti,reset-bits : Contains the reset control register information > - Should contain 7 cells for each reset exposed to > - consumers, defined as: > - Cell #1 : offset of the reset assert control > - register from the syscon register base > - Cell #2 : bit position of the reset in the reset > - assert control register > - Cell #3 : offset of the reset deassert control > - register from the syscon register base > - Cell #4 : bit position of the reset in the reset > - deassert control register > - Cell #5 : offset of the reset status register > - from the syscon register base > - Cell #6 : bit position of the reset in the > - reset status register > - Cell #7 : Flags used to control reset behavior, > - available flags defined in the DT include > - file > - > -SysCon Reset Consumer Nodes > -=========================== > -Each of the reset consumer nodes should have the following properties, > -in addition to their own properties. > - > -Required properties: > --------------------- > - - resets : A phandle to the reset controller node and an index number > - to a reset specifier as defined above. > - > -Please also refer to Documentation/devicetree/bindings/reset/reset.txt for > -common reset controller usage by consumers. > - > -Example: > --------- > -The following example demonstrates a syscon node, the reset controller node > -using the syscon node, and a consumer (a DSP device) on the TI Keystone 2 > -66AK2E SoC. > - > -/ { > - soc { > - psc: power-sleep-controller@2350000 { > - compatible = "syscon", "simple-mfd"; > - reg = <0x02350000 0x1000>; > - > - pscrst: reset-controller { > - compatible = "ti,k2e-pscrst", "ti,syscon-reset"; > - #reset-cells = <1>; > - > - ti,reset-bits = < > - 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */ > - 0xa40 5 0xa44 3 0 0 (ASSERT_SET | DEASSERT_CLEAR | STATUS_NONE) /* 1: example */ > - >; > - }; > - }; > - > - dsp0: dsp0 { > - ... > - resets = <&pscrst 0>; > - ... > - }; > - }; > -}; > -- > 2.53.0 >