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a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=date:from:to:cc:subject:message-id :references:mime-version:content-type:in-reply-to; s=k1; bh=UFoL O/iOJWXUZ8LPtrfxkOTStHkWrqT3iuMucBrRSF0=; b=ahJkmHjcaauoFZIGscNZ Rb0iiLRERHmHMIMp3HT6/ZOz81NXw6AWqSN0g+LY4KAq6ewLqYhHBqKrv9+u541o yIkalt90fhUtR6dhzV1pzfy6eZbd/pn29p+R/q2WhJjtwN66bfCafCI46pQOtFE9 1ii+/C3ijdeR8RUwiFgYys16LiDuUVtk1LEiNqqtXk7pZjrHbBug2OpSUvbH58yp wdv8BlL13ybvDFUs3NVhM0FZnO6Kwbcmmj2MxvhfGqMz7cXg20D1cUX0MxEaoBox s36BG5sYjQ9Trepqssd7alH8EaC2H5wfQ2RCxaH4EkODjog48ynOxKvk/YTv5sLJ Lg== Received: (qmail 570348 invoked from network); 11 Nov 2026 11:28:10 +0100 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 11 Nov 2026 11:28:10 +0100 X-UD-Smtp-Session: l3s3148p1@2aLUpv1fHsAujnun Date: Wed, 11 Nov 2026 11:28:10 +0100 From: Wolfram Sang To: Biju Das Cc: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Philipp Zabel , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: Re: [PATCH v25 07/11] mmc: renesas_sdhi: Add tuning delay support for RZ/G2L Message-ID: References: <20261028-rzg3l_sdhi-v25-0-57f16691c2ed@bp.renesas.com> <20261028-rzg3l_sdhi-v25-7-57f16691c2ed@bp.renesas.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="LxrXcrfTQN6mcX3w" Content-Disposition: inline In-Reply-To: <20261028-rzg3l_sdhi-v25-7-57f16691c2ed@bp.renesas.com> --LxrXcrfTQN6mcX3w Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Oct 28, 2026 at 12:51:24PM +0000, Biju Das wrote: > From: Biju Das >=20 > RZ/G2L and later SoCs (RZ/V2M and RZ/G3E) need a hardware adjustment > delay written to SCC_TMPPORT2 on signal-voltage switch during > tuning: 0x1 for 1.8V, 0x0 for 3.3V. >=20 > Add a TMIO_MMC_TUNING_DELAY flag and > renesas_sdhi_set_hw_adjustment_delay(), called from > renesas_sdhi_start_signal_voltage_switch() after the regulator is > set, and reset SCC_TMPPORT2 to 0 at the start of > renesas_sdhi_execute_tuning() when the flag is set and tap_num =3D=3D 8. >=20 > Add a dedicated of_data_rz_g2l descriptor with this flag and switch > of_rzg2l_compatible to use it instead of the generic R-Car Gen3 > descriptor. >=20 > Signed-off-by: Biju Das Reviewed-by: Wolfram Sang --LxrXcrfTQN6mcX3w Content-Type: application/pgp-signature; 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