From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=194.117.254.33 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794396261; b=lU3RJtsGZh95S2GwTSkNPtwWv0Z/Cm/XowgMRoBEuLC8YVjI2hL/HfLL8qgcE4jNT9/t g1/vcBsR9+mdtlqVbpMcQRHA1PJ0epFlatTVSE5kGcBUdm5BDjPXuZ0fPsT0q1wVSOZPM Kg4Hb/LMXQH6tQfHq2+XHaYFYhPjmypn+KkvLqneyTYgIYuDUPyXyxaOsnfk0fI1ygiN3 GnjV6K0D5MSzMl7049s029kcIqyOabVOC5gphfT9lETAUa9fjVGZ4kLqz7aAqec+hJ+hb FubK+dFRv7AaaEN8DcMCV63QLFXG4wPBIegCiXwXFondFgq3sibQKQwvWM58zjsnrpw== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794396261; h=DMARC-Filter:DKIM-Signature:Received:Received:X-UD-Smtp-Session:Date: From:To:Cc:Subject:Message-ID:References:MIME-Version:Content-Type: Content-Disposition:In-Reply-To; bh=TyC5RG/xS6ek+VZLhU7M9QAvgJKCmjqZswCm4LBfDrM=; b=ZrisT2RevtlPIE/mVu32TSixYTNGJ9jgb6JHnWtFvgwxXvJP6d0+higTOAjS0sF8lbI1 NLfykDx+ftySe6oYBcK16FQBZAxHG+mObhpPxJo1gobNsREWMFpGCtxhm53iytFU6xfS+ L5bh/QzMh7J6PJb1zxjR7PjvtlmS1v7rRwGoWT5xkhAjV4AR3Q1zMBH7FBTIuLLdBbNNw HBs7jEpIY50bVYkNVsvSFNcW5ETOrvkwn1Cdjy5Mc5HAscg36sMbZoS+Zj1Sy2jPgzA3g TsxfyJnbgSOUCDub3ykseUxXxRovys5nhGgT0tVgUEqSyMAXQ68L0wHrqV/ooxR3uoQ== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass header.d=sang-engineering.com header.i=@sang-engineering.com header.a=rsa-sha256 header.s=k1 header.b="AQ5+E/2N"; arc=none smtp.remote-ip=194.117.254.33 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E68CB606A321 for ; Wed, 11 Nov 2026 11:24:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org E68CB606A321 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=sang-engineering.com header.i=@sang-engineering.com header.a=rsa-sha256 header.s=k1 header.b=AQ5+E/2N DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=date:from:to:cc:subject:message-id :references:mime-version:content-type:in-reply-to; s=k1; bh=TyC5 RG/xS6ek+VZLhU7M9QAvgJKCmjqZswCm4LBfDrM=; b=AQ5+E/2NMJbces3nNLB7 Dhp+waLJGw1j50cO1JBzfY4d1iIDKC9tJdVFKJFRKAbN6RpKi235h/eVd1rCzcpk 9pGbHjrWplc5sEuTwWsFZvbx+0IrBTSZBEVa4wWQkn8IKuw4lwDFlbbzJKKEHA+P gtPA53DgA/519DujpqPJx3D77/mfkho2wV/cIaz6i21QeWap/p4wkpRko/YtDZD0 jlD2Gqz50Gi492U+ui3ZbtI0Yj888QDdhfWpR8hra68pZ5sgN16tmCw+k+pRjVy6 wcvffTVy4yRWJPmGq3TNnhb5YjZ7kX3yYUVO+6/coo/pggt8mincU8ji9Xf7PC89 Rg== Received: (qmail 590099 invoked from network); 11 Nov 2026 12:24:15 +0100 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 11 Nov 2026 12:24:15 +0100 X-UD-Smtp-Session: l3s3148p1@cp1bb/5fSuEujnun Date: Wed, 11 Nov 2026 12:24:14 +0100 From: Wolfram Sang To: Biju Das Cc: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Philipp Zabel , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: Re: [PATCH v25 11/11] mmc: renesas_sdhi: Add RZ/G3L SDHI support Message-ID: References: <20261028-rzg3l_sdhi-v25-0-57f16691c2ed@bp.renesas.com> <20261028-rzg3l_sdhi-v25-11-57f16691c2ed@bp.renesas.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="TDYaANhAGqmkt0P2" Content-Disposition: inline In-Reply-To: <20261028-rzg3l_sdhi-v25-11-57f16691c2ed@bp.renesas.com> --TDYaANhAGqmkt0P2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Oct 28, 2026 at 12:51:28PM +0000, Biju Das wrote: > From: Biju Das >=20 > The RZ/G3L SDHI is close to existing variants but differs in three > ways the driver can't handle today: >=20 > - It has an 11-bit clock divider. The upper bits live in CLK_CTL > bits [17:16], so the register must be written with a 32-bit access > on this SoC. > - Tuning needs a second HW adjustment register (HWADJ2), programmed > together with TMPPORT2. > - HWADJ4 must be cleared when tuning starts. >=20 > Signed-off-by: Biju Das Reviewed-by: Wolfram Sang I like the renesas_sdhi_sclken() helper. All review done, congrats! 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