From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Biju Das <biju.das.au@gmail.com>
Cc: Ulf Hansson <ulfh@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v25 00/11] Add Renesas RZ/G3L SD/eMMC support
Date: Wed, 11 Nov 2026 12:48:33 +0100 [thread overview]
Message-ID: <avRWDN43k3LcFVRa@ninjato> (raw)
In-Reply-To: <20261028-rzg3l_sdhi-v25-0-57f16691c2ed@bp.renesas.com>
[-- Attachment #1: Type: text/plain, Size: 1037 bytes --]
On Wed, Oct 28, 2026 at 12:51:17PM +0000, Biju Das wrote:
> Hi All,
>
> The Renesas RZ/G3L SoC has:
>
> Channel 0 supports SD and eMMC (including HS400/HS400ES).
> Channel 1 supports SD and eMMC (except for HS400).
> Channel 2 supports SD.
>
> The SoC supports a maximum frequency of 150 MHz. The SD0 interface does
> not support IOVS and PWEN in the SDHI register (no internal regulator),
> unlike SD1 and SD2. It has an internal divider for all modes except HS400.
> It also has a 2048-bit divider compared to 512 on others. Moreover
> RZ/G3L supports HS400 enhanced strobe mode.
>
> This patch series support all modes except HS400. HS400 support will be
> added later.
>
> This patch series tested on smarc-rz{v2l,g2l,g2lc,g2ul,g3s,g3l,g3e},
> rz{v2h,t2h}-evk and hihope-rz{g2h,g2m,g2n} boards
Tested with a Renesas Salvator-XS board (R-Car M3N). I don't see bugs or
performance regressions. I think the series is good to go!
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thank you!
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
prev parent reply other threads:[~2026-11-11 11:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-28 12:51 Biju Das
2026-10-28 12:51 ` [PATCH v25 01/11] dt-bindings: mmc: renesas,sdhi: Document RZ/G3L (r9a08g046) SoC Biju Das
2026-10-28 12:51 ` [PATCH v25 02/11] mmc: renesas_sdhi: Clean up whitespace and add OF table sentinels Biju Das
2026-10-28 12:51 ` [PATCH v25 03/11] mmc: renesas_sdhi: Add clk_mask to support wider clock dividers Biju Das
2026-11-11 10:07 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 04/11] mmc: renesas_sdhi: Add max_divider field to support SoC-specific clock ranges Biju Das
2026-11-11 10:13 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 05/11] mmc: renesas_sdhi: Add SDHI_SD_CLK_CTL_DIV1 macro for 1/1 option Biju Das
2026-10-28 12:51 ` [PATCH v25 06/11] mmc: renesas_sdhi: Make clock divider mask configurable Biju Das
2026-11-11 10:14 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 07/11] mmc: renesas_sdhi: Add tuning delay support for RZ/G2L Biju Das
2026-11-11 10:28 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 08/11] mmc: renesas_sdhi: Add TMIO_MMC_INTERNAL_DIVIDER flag Biju Das
2026-11-11 10:32 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 09/11] mmc: renesas_sdhi: Add optional axis/axim reset controls Biju Das
2026-10-28 12:51 ` [PATCH v25 10/11] mmc: renesas_sdhi: Add write32_hook for CTL_SD_CARD_CLK_CTL register writes Biju Das
2026-11-11 10:36 ` Wolfram Sang
2026-10-28 12:51 ` [PATCH v25 11/11] mmc: renesas_sdhi: Add RZ/G3L SDHI support Biju Das
2026-11-11 11:24 ` Wolfram Sang
2026-11-11 11:48 ` Wolfram Sang [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=avRWDN43k3LcFVRa@ninjato \
--to=wsa+renesas@sang-engineering.com \
--cc=biju.das.au@gmail.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=geert+renesas@glider.be \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
--cc=ulfh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®