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From: Frank Li <Frank.li@oss.nxp.com>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Frank Li <Frank.Li@nxp.com>, Vinod Koul <vkoul@kernel.org>,
	"Joerg Roedel (AMD)" <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	Thierry Reding <thierry.reding@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Frank Li <Frank.Li@kernel.org>,
	Larisa IIeana Grigore <larisa.grigore@nxp.com>,
	imx@lists.linux.dev, dmaengine@vger.kernel.org,
	linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
	linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH v5 7/7] arm64: dts: imx95: convert eDMA to per-channel child nodes
Date: Wed, 11 Nov 2026 11:59:29 -0600	[thread overview]
Message-ID: <avStAcZcvCRfDinx@SMW015318> (raw)
In-Reply-To: <20261111-edma-iommu-v3-v5-7-2537cebe6ca2@nxp.com>

On Wed, Nov 11, 2026 at 09:47:35PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Convert edma2 and edma3 from flat interrupt arrays at the parent node
> to per-channel child nodes (dma-channel@<addr>). Each child carries
> its own reg (real per-channel MMIO region) and interrupts property.
>
> edma2 (64 channels at 0x42000000):
>   - Channel N at 0x42010000 + N * 0x8000 (size 0x8000)
>   - Paired interrupts: SPI 128-159, two channels per SPI
>
> edma3 (64 channels at 0x42210000):
>   - Channel N at 0x42220000 + N * 0x8000 (size 0x8000)
>   - Paired interrupts: SPI 256-287, two channels per SPI
>
> edma1 (imx93-edma3, 31 channels with 1:1 non-paired interrupts) is
> left unchanged as it uses a different interrupt scheme.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 774 ++++++++++++++++++++++++++-----
>  1 file changed, 646 insertions(+), 128 deletions(-)
>
...
> -					     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>;
>  				clock-names = "dma";
> +
> +				dma-channel@42010000 {
> +					reg = <0x42010000 0x8000>;
> +					interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
> +				};

where iommu informaiton?

Frank

      reply	other threads:[~2026-11-11 17:59 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-11 13:47 [PATCH v5 0/7] dmaengine: add DMA channel bus and fsl-edma per-channel IOMMU support Peng Fan (OSS)
2026-11-11 13:47 ` [PATCH v5 1/7] dmaengine: fsl-edma: unregister channels before vchan cleanup Peng Fan (OSS)
2026-11-11 17:27   ` Frank Li
2026-11-11 13:47 ` [PATCH v5 2/7] dmaengine: add a bus for DMA channel devices Peng Fan (OSS)
2026-11-11 17:31   ` Frank Li
2026-11-11 13:47 ` [PATCH v5 3/7] iommu: register the DMA channel bus for IOMMU notifications Peng Fan (OSS)
2026-11-11 13:47 ` [PATCH v5 4/7] dmaengine: move channel devices to the DMA channel bus Peng Fan (OSS)
2026-11-11 17:41   ` Frank Li
2026-11-11 13:47 ` [PATCH v5 5/7] dt-bindings: dma: fsl,edma: add per-channel child node support Peng Fan (OSS)
2026-11-11 13:47 ` [PATCH v5 6/7] dmaengine: fsl-edma: support per-channel DT child nodes Peng Fan (OSS)
2026-11-11 17:57   ` Frank Li
2026-11-11 13:47 ` [PATCH v5 7/7] arm64: dts: imx95: convert eDMA to per-channel " Peng Fan (OSS)
2026-11-11 17:59   ` Frank Li [this message]

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