From: Carlo Caione <ccaione@baylibre.com>
To: Brian Masney <masneyb@kernel.org>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Brian Masney" <bmasney+clk@redhat.com>,
"Jerome Brunet" <jbrunet+clk@baylibre.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"Maxime Coquelin" <maxime.coquelin@st.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Michael Turquette" <mturquette@linaro.org>,
"Stephen Boyd" <sboyd@codeaurora.org>,
"David Laight" <david.laight.linux@gmail.com>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
"Jerome Brunet" <jbrunet@baylibre.com>
Subject: Re: [PATCH v2 1/3] clk: divider: Fix the divisor for rates above 4.29 GHz
Date: Thu, 12 Nov 2026 16:29:55 +0100 [thread overview]
Message-ID: <avXa2Z3R6Xogr6Sw@macbook.homenet.telecomitalia.it> (raw)
In-Reply-To: <179449618653.1227210.1767827907767958978.b4-review@b4>
On Thu, Nov 12, 2026 at 10:09:46 +0100, Brian Masney wrote:
> Hi Carlo,
Hi Brian,
> > static int _div_round_up(const struct clk_div_table *table,
> > unsigned long parent_rate, unsigned long rate,
> > unsigned long flags)
> > {
> > - int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
> > + int div = _get_div_round_up(parent_rate, rate);
>
> _get_div_round_up() returns an unsigned long however it's downsized to
> an int here.
Right, but wasn't also DIV_ROUND_UP_ULL() previously returning a u64
that was stored in the same int?
thanks,
--
Carlo Caione
next prev parent reply other threads:[~2026-11-12 15:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 9:36 [PATCH v2 0/3] Fix clk-divider rates above 4.29 GHz on 64-bit Carlo Caione
2026-11-12 9:36 ` [PATCH v2 1/3] clk: divider: Fix the divisor for rates above 4.29 GHz Carlo Caione
2026-11-12 15:09 ` Brian Masney
2026-11-12 15:29 ` Carlo Caione [this message]
2026-11-12 15:38 ` Sebastian Reichel
2026-11-12 15:34 ` Sebastian Reichel
2026-11-12 9:37 ` [PATCH v2 2/3] clk: divider: Fix round-closest for rates above the parent rate Carlo Caione
2026-11-12 15:41 ` Sebastian Reichel
2026-11-12 9:37 ` [PATCH v2 3/3] clk: divider: test: Add tests for rates above 4.29 GHz Carlo Caione
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