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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fDtfDvuBF99MsVwzDXO/tvaRdrl6A5W15uHqxVTuoe4cNtzYUqqzY+UUB3M9RIk6mZu4pknUdSC7CkZlusVfKdIupRx3ekx01uB8UZP1lxXYPV0C4fwNoPnsAV2Wn0hP/Ph2ALOYGXB661AnvEhYXGRs2938+SidHE9GnTVX9n7AohkT4VLi/22jSj/UZtdV2T2oHEOtZKkgfaPNdwucRm5FfmxFShbESEz/D9SbeZu8ZzOKxgditydIDpnlcRSdqftjkdy8Kud3Ez9iPsvP+mXE+PFVy+WiPAB2/G4+kddB5e1Z8qQ8tcC7JjY/yYpw8uHm7z7M6/baIEmx1l0fe9NWKoAmYt5+68T3ww91yV4IyA69vP1Te8StYpa7cK3uYkTDqwOjWGyZwUsIbjHAcC3Bq4TUdRF/cDsdQvhC0LAk/7+OmKZICYUEu98VzLa5 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2026 21:09:24.9719 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 98b3e7ca-6bf1-4aef-5551-08df41ca656d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MW2PEPF00014677.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6280 On Fri, Nov 13, 2026 at 09:27:19PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > With the per-domain CD table, every non-PASID sharer of a SID builds the > same normal-domain STE: same S1ContextPtr, S1DSS and S1CDMAX. Disable > PASID and ATS for shared SIDs as well, so the remaining STE fields are > common too, and let any sharer program the STE. This also handles the > case where one device's driver attaches before the stream owner's driver: > the first attach now installs a valid STE instead of leaving the boot or > firmware STE in place. > > A per-device release must not abort a shared STE while other sharers > remain, otherwise it would break their ongoing DMA. Use a dedicated > release domain instead of inferring release from the STE contents: > group-wide BLOCKED attaches still program the abort STE, while the > release domain skips writes until the last master no longer shares the > SID. > > Disable SVA, PASID, vSMMU nesting, ATS and IOPF/stall for shared-SID > masters since all of them require an unambiguous SID-to-device mapping. > Reject sharing at insert_master() time if either master wants stalling, > if the incoming master requires ATS, if the existing master has PASID, > ATS or vSMMU state enabled, or if a PCI and a non-PCI master would share > the SID. Other ATS-capable shared devices have their ATS capability > prepared, but ATS is not enabled while the SID is shared. > > Resolve stall_enabled before insert_master(), and use master->stall_enabled > directly for CD.S, STE.S1STALLD and STE.S2S. A shared master can never > have stalling enabled. > > Add arm_smmu_master_shares_sid() as an inline helper in arm-smmu-v3.h so > that arm-smmu-v3-sva.c and arm-smmu-v3-iommufd.c can use it without > repeating the list_empty() pattern. > > Signed-off-by: Peng Fan I am asking a bigger question in PATCH-4 for Robin to confirm, yet Sashiko gave a few scary findings against patch 7-9. Would you please run Sashiko locally and address them as much as possible, before sending a new version? Nicolin