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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36951059f4dsm13348541a91.0.2026.05.19.04.15.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 May 2026 04:15:24 -0700 (PDT) Message-ID: Date: Tue, 19 May 2026 19:15:20 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] arm64: dts: qcom: glymur: add coresight nodes To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260518-add-coresight-nodes-for-glymur-v4-1-45f54f441899@oss.qualcomm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <20260518-add-coresight-nodes-for-glymur-v4-1-45f54f441899@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=F9ZnsKhN c=1 sm=1 tr=0 ts=6a0c464e cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=sxtEvhXGaLqlDIbFQVIA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: if5Ta0fdI4Pz2VgBydqTlAen-0kvpwre X-Proofpoint-GUID: if5Ta0fdI4Pz2VgBydqTlAen-0kvpwre X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDExMCBTYWx0ZWRfX8Uf72WEoJwDl zksgmOD2kssUXq/s18L5UhdVQn1zC+aX4RaEmqIXEEO4OSZ15KfzdZnlgTw6kA7IE288Ny07OSp bBYsojroxGAZ9kDPAJsB9ei/3bfprao+YcpMgZgNsGComE/KyurbYBAkiO3+TniifXRPbblDvow 8dFNncNSzNnPfLD7siaeW5r7HGq70Z58FuiUKxbQI9Y7QBiil6zNuF+sBXqSviADGUqsCS36+TB dh6s2EdC1oPPoDQDmT0EBotgTjPW/sF/Lt16lE5Iw/DtxdqJQCzbck92mDQNuYLSp3A2yiEIT8C WZA4dmAVLBeIFqmInhHxguDJuYP65w95+JJx2oGZWVTsxOStZIu1zQEH4aO33byuAJoAzfV6XaM tT+uVskt7aEIiu3a/GGG1ZwPxPp4xb0ALiD93YIBf4+v9YCfQrfAmzwbt0KyjEJQ6MBuWisKPuH 4pjQQDqDgZgN/eoEaoA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 suspectscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190110 On 5/18/2026 1:47 PM, Jie Gan wrote: > Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF. > These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and > some small subsystems, such as GCC, IPCC, PMU and so on. > > Delete cti_wpss DT node on Mahua since this device will cause NoC issue > on Mahua device. > [...] > + > + tn@11200000 { > + compatible = "qcom,coresight-tnoc", "arm,primecell"; TraceNoc is an amba device, but it has issue to probe through amba bus on Glymur platform. Its didnt report an error on the probe process, just deferred the probe process forevert because cannot vote clk in amba_probe. Need update the compatible to force the device to probe with platform driver. Will send a new patch to address this issue. Sorry for skipped this issue in previous versions. Thanks, Jie > + reg = <0x0 0x11200000 0x0 0x3c00>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@6 { > + reg = <6>; > + > + tn_ag_in6: endpoint { > + remote-endpoint = <&mm_dsb_tpdm_out>; > + }; > + }; > + > + port@10 { > + reg = <0x10>; > + > + tn_ag_in16: endpoint { > + remote-endpoint = <&east_dsb_tpdm_out>; > + }; > + }; > + > + port@21 { > + reg = <0x21>; > + > + tn_ag_in33: endpoint { > + remote-endpoint = <&west_dsb_tpdm_out>; > + }; > + }; > + > + port@23 { > + reg = <0x23>; > + > + tn_ag_in35: endpoint { > + remote-endpoint = <&qm_tpdm_out>; > + }; > + }; > + > + port@24 { > + reg = <0x24>; > + > + tn_ag_in36: endpoint { > + remote-endpoint = <&gcc_tpdm_out>; > + }; > + }; > + > + port@32 { > + reg = <0x32>; > + > + tn_ag_in50: endpoint { > + remote-endpoint = <&pcie_rscc_tpda_out>; > + }; > + }; > + > + port@35 { > + reg = <0x35>; > + > + tn_ag_in53: endpoint { > + remote-endpoint = <&cdsp_funnel_out>; > + }; > + }; > + > + port@3f { > + reg = <0x3f>; > + > + tn_ag_in63: endpoint { > + remote-endpoint = <¢er_dsb_tpdm_out>; > + }; > + }; > + > + port@40 { > + reg = <0x40>; > + > + tn_ag_in64: endpoint { > + remote-endpoint = <&ipcc_cmb_tpdm_out>; > + }; > + }; > + > + port@41 { > + reg = <0x41>; > + > + tn_ag_in65: endpoint { > + remote-endpoint = <&qrng_tpdm_out>; > + }; > + }; > + > + port@42 { > + reg = <0x42>; > + > + tn_ag_in66: endpoint { > + remote-endpoint = <&pmu_tpdm_out>; > + }; > + }; > + > + port@43 { > + reg = <0x43>; > + > + tn_ag_in67: endpoint { > + remote-endpoint = <&rdpm_west_cmb0_tpdm_out>; > + }; > + }; > + > + port@44 { > + reg = <0x44>; > + > + tn_ag_in68: endpoint { > + remote-endpoint = <&rdpm_west_cmb1_tpdm_out>; > + }; > + }; > + > + port@45 { > + reg = <0x45>; > + > + tn_ag_in69: endpoint { > + remote-endpoint = <&rdpm_west_cmb2_tpdm_out>; > + }; > + }; > + > + port@4b { > + reg = <0x4b>; > + > + tn_ag_in75: endpoint { > + remote-endpoint = <&south_dsb2_tpdm_out>; > + }; > + }; > + > + port@52 { > + reg = <0x52>; > + > + tn_ag_in82: endpoint { > + remote-endpoint = <&south_dsb_tpdm_out>; > + }; > + }; > + > + port@53 { > + reg = <0x53>; > + > + tn_ag_in83: endpoint { > + remote-endpoint = <¢er_dsb1_tpdm_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + tn_ag_out: endpoint { > + remote-endpoint = <&funnel0_in0>; > + }; > + }; > + }; > + }; > + > + tpdm@11207000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11207000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + mm_dsb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in6>; > + }; > + }; > + }; > + }; > + > + tpdm@1120b000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1120b000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + east_dsb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in16>; > + }; > + }; > + }; > + }; > + > + tpdm@11213000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11213000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + west_dsb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in33>; > + }; > + }; > + }; > + }; > + > + tpdm@11219000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11219000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + center_dsb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in63>; > + }; > + }; > + }; > + }; > + > + tpdm@1121a000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121a000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + ipcc_cmb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in64>; > + }; > + }; > + }; > + }; > + > + tpdm@1121b000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121b000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + qrng_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in65>; > + }; > + }; > + }; > + }; > + > + tpdm@1121c000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121c000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + pmu_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in66>; > + }; > + }; > + }; > + }; > + > + tpdm@1121d000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121d000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + rdpm_west_cmb0_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in67>; > + }; > + }; > + }; > + }; > + > + tpdm@1121e000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121e000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + rdpm_west_cmb1_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in68>; > + }; > + }; > + }; > + }; > + > + tpdm@1121f000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x1121f000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + rdpm_west_cmb2_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in69>; > + }; > + }; > + }; > + }; > + > + tpdm@11220000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11220000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + center_dsb1_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in83>; > + }; > + }; > + }; > + }; > + > + tpdm@11224000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11224000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + south_dsb2_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in75>; > + }; > + }; > + }; > + }; > + > + tpdm@11228000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11228000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + south_dsb_tpdm_out: endpoint { > + remote-endpoint = <&tn_ag_in82>; > + }; > + }; > + }; > + }; > + > + tpdm@11470000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11470000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <32>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + pcie_rscc_tpdm_out: endpoint { > + remote-endpoint = <&pcie_rscc_tpda_in0>; > + }; > + }; > + }; > + }; > + > + tpda@11471000 { > + compatible = "qcom,coresight-tpda", "arm,primecell"; > + reg = <0x0 0x11471000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + pcie_rscc_tpda_in0: endpoint { > + remote-endpoint = <&pcie_rscc_tpdm_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + pcie_rscc_tpda_out: endpoint { > + remote-endpoint = <&tn_ag_in50>; > + }; > + }; > + }; > + }; > + > + tpdm@11c03000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c03000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <64>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_prio4_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in4>; > + }; > + }; > + }; > + }; > + > + funnel@11c04000 { > + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; > + reg = <0x0 0x11c04000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@5 { > + reg = <5>; > + > + aoss_funnel_in5: endpoint { > + remote-endpoint = <&aoss_tpda_out>; > + }; > + }; > + > + port@6 { > + reg = <6>; > + > + aoss_funnel_in6: endpoint { > + remote-endpoint = <&funnel0_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + aoss_funnel_out: endpoint { > + remote-endpoint = <&etf0_in>; > + }; > + }; > + }; > + }; > + > + tmc_etf: tmc@11c05000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x0 0x11c05000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + etf0_in: endpoint { > + remote-endpoint = <&aoss_funnel_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + etf0_out: endpoint { > + remote-endpoint = <&swao_rep_in>; > + }; > + }; > + }; > + }; > + > + replicator@11c06000 { > + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; > + reg = <0x0 0x11c06000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + swao_rep_in: endpoint { > + remote-endpoint = <&etf0_out>; > + }; > + }; > + }; > + > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + > + swao_rep_out1: endpoint { > + remote-endpoint = <&eud_in>; > + }; > + }; > + }; > + }; > + > + tpda@11c08000 { > + compatible = "qcom,coresight-tpda", "arm,primecell"; > + reg = <0x0 0x11c08000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + aoss_tpda_in0: endpoint { > + remote-endpoint = <&swao_prio0_tpdm_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + aoss_tpda_in1: endpoint { > + remote-endpoint = <&swao_prio1_tpdm_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + aoss_tpda_in2: endpoint { > + remote-endpoint = <&swao_prio2_tpdm_out>; > + }; > + }; > + > + port@3 { > + reg = <3>; > + > + aoss_tpda_in3: endpoint { > + remote-endpoint = <&swao_prio3_tpdm_out>; > + }; > + }; > + > + port@4 { > + reg = <4>; > + > + aoss_tpda_in4: endpoint { > + remote-endpoint = <&swao_prio4_tpdm_out>; > + }; > + }; > + > + port@5 { > + reg = <5>; > + > + aoss_tpda_in5: endpoint { > + remote-endpoint = <&swao_tpdm_out>; > + }; > + }; > + }; > + > + out-ports { > + port { > + aoss_tpda_out: endpoint { > + remote-endpoint = <&aoss_funnel_in5>; > + }; > + }; > + }; > + }; > + > + tpdm@11c09000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c09000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <64>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_prio0_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in0>; > + }; > + }; > + }; > + }; > + > + tpdm@11c0a000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c0a000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <64>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_prio1_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in1>; > + }; > + }; > + }; > + }; > + > + tpdm@11c0b000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c0b000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <64>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_prio2_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in2>; > + }; > + }; > + }; > + }; > + > + tpdm@11c0c000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c0c000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,cmb-element-bits = <64>; > + qcom,cmb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_prio3_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in3>; > + }; > + }; > + }; > + }; > + > + tpdm@11c0d000 { > + compatible = "qcom,coresight-tpdm", "arm,primecell"; > + reg = <0x0 0x11c0d000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + qcom,dsb-element-bits = <32>; > + qcom,dsb-msrs-num = <32>; > + > + out-ports { > + port { > + swao_tpdm_out: endpoint { > + remote-endpoint = <&aoss_tpda_in5>; > + }; > + }; > + }; > + }; > + > apps_smmu: iommu@15000000 { > compatible = "qcom,glymur-smmu-500", > "qcom,smmu-500", > @@ -7132,4 +8173,60 @@ gpuss-1-critical { > }; > }; > }; > + > + tpdm-cdsp-llm { > + compatible = "qcom,coresight-static-tpdm"; > + qcom,cmb-element-bits = <32>; > + > + out-ports { > + port { > + cdsp_llm_tpdm_out: endpoint { > + remote-endpoint = <&cdsp_tpda_in1>; > + }; > + }; > + }; > + }; > + > + tpdm-cdsp-llm2 { > + compatible = "qcom,coresight-static-tpdm"; > + qcom,cmb-element-bits = <32>; > + > + out-ports { > + port { > + cdsp_llm2_tpdm_out: endpoint { > + remote-endpoint = <&cdsp_tpda_in2>; > + }; > + }; > + }; > + }; > + > + tpdm-cdsp-cmsr { > + compatible = "qcom,coresight-static-tpdm"; > + > + qcom,cmb-element-bits = <32>; > + qcom,dsb-element-bits = <32>; > + > + out-ports { > + port { > + cdsp_cmsr_tpdm_out: endpoint { > + remote-endpoint = <&cdsp_tpda_in3>; > + }; > + }; > + }; > + }; > + > + tpdm-cdsp-cmsr2 { > + compatible = "qcom,coresight-static-tpdm"; > + > + qcom,cmb-element-bits = <32>; > + qcom,dsb-element-bits = <32>; > + > + out-ports { > + port { > + cdsp_cmsr2_tpdm_out: endpoint { > + remote-endpoint = <&cdsp_tpda_in4>; > + }; > + }; > + }; > + }; > }; > diff --git a/arch/arm64/boot/dts/qcom/mahua.dtsi b/arch/arm64/boot/dts/qcom/mahua.dtsi > index 990a02c6afc1..22822b6b2e8b 100644 > --- a/arch/arm64/boot/dts/qcom/mahua.dtsi > +++ b/arch/arm64/boot/dts/qcom/mahua.dtsi > @@ -21,6 +21,7 @@ > /delete-node/ &cpu_pd15; > /delete-node/ &cpu_pd16; > /delete-node/ &cpu_pd17; > +/delete-node/ &cti_wpss; > /delete-node/ &thermal_aoss_6; > /delete-node/ &thermal_aoss_7; > /delete-node/ &thermal_cpu_2_0_0; > > --- > base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83 > change-id: 20260515-add-coresight-nodes-for-glymur-49045aa9ede8 > > Best regards,