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Thu, 2 Jul 2026 21:07:33 -0700 From: Nicolin Chen To: Will Deacon , Robin Murphy , "Joerg Roedel" , Bjorn Helgaas , "Jason Gunthorpe" CC: "Rafael J . Wysocki" , Len Brown , Pranjal Shrivastava , Mostafa Saleh , Lu Baolu , Kevin Tian , , , , , , , Shuai Xue Subject: [PATCH v5 03/18] PCI: Propagate FLR return values to callers Date: Thu, 2 Jul 2026 21:06:28 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001504:EE_|SJ0PR12MB6926:EE_ X-MS-Office365-Filtering-Correlation-Id: 01f0f2b8-9300-4c37-6d61-08ded8b8a6d2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|36860700016|7416014|376014|1800799024|82310400026|11063799006|18002099003|22082099003|6133799003|5023799004|56012099006; X-Microsoft-Antispam-Message-Info: OTLpokAwdfP28hd/f/ZEdkoK7ephGKWVhXpwzyTlf1pgcH/MXJRr3ApyYPwMBzwJ4MYHeDknLbo2MUV7IUpLuhcX+0H8gwIkvky3HaT9RzGRagNUimv7iKvZGUdqDlHumzEhlRarR/sruObP9cAwmVXsmRKyuOhubJeEvifrYudLO0icqA0j+G9Mks5DrXD8rk2jZotBQF4KTnym2xARcMfGdGimaXbj0yn3d5eiKFlqM/4/DlgpxF1ylxYaZuEALtKbjO0opiI30SPQ9mSBd+vDE0S5jlw3tSIDmU81icY5GGvR+h2Pl5QSNbgVR+nKF2IU+ANSawcC/8d7dugcCD4O3kVLjTdTkcjO07peLZKeayhgodFfpx5aFcqJkoUjZq+4w3kx+gAPLnwLIIGhQKiWFt7gPpAhKOMSo50vtEWWshv7dysqrOrf3Zu5zsvDzJz4LRuLeg710THxUNFIv9VHbprws3vAQZ/Ak7sCacNj26DKjdZZ1pqdTPlWOBkhizs34bOcb/65wjUaC3BmBHoGldzmvFSztnHK1EouC2GyGYbEK6O4NGgwTsAczNFRVs9bL/qMWBvHqbrfuLsm8gcZ77DsDcr3+PuOMxa2YjY8ybKO920R9yy7s/EFtr9INiKFPaRO+W1MJi10Q3DhvclokTdcJOo0nt1pjL/200P4d/DKnsmfRRhGFg9nvf81jubtcROevq21+BeotZDnJw== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(23010399003)(36860700016)(7416014)(376014)(1800799024)(82310400026)(11063799006)(18002099003)(22082099003)(6133799003)(5023799004)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LNicIyQGjx9vtqAoukTuG4UA88bl85o5Xx17gDNRezdayqfpRre3GaFBkHZotoQkDrYBMnkk84v5u3Atyrn3YiE+1aX3YAdAYwWsXGITEglWOEEotvS5jMdNMj+eSyCEHYKYbb4MO2NzUsiJ08rutwpndPk0hs/hn2Cti1Remru7FBvNwWjpW9G6tc0a+fzZVsC6AGfXcJ/u3ygyAX5IorzqyBzOf5WA8z3O4iVKHGPiCEB5VmlZQgnWbEHjFPzcbUKt8EtJ3VjgWLTGUvvXby+Gq18zpOi8rkhZZhME3qKTii/OTpPUhHMIsnilnjPTYGWG42XM5hnTETKRcPXDEZ5xvEKd9R6VzaHVOz5BcaS2eiPWeSdh5bC3ZHwe4pKSLkVTKfbWgz2ObWDPxcL3k2nlv3eCG529EHWa4nazzCcKU2QgUe4C6HBlvX7kFASh X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jul 2026 04:07:51.6230 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 01f0f2b8-9300-4c37-6d61-08ded8b8a6d2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001504.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6926 A reset failure implies that the device might be unreliable. E.g. its ATC might still retain stale entries. Thus, the IOMMU layer cannot trust this device to resume its ATS function that can lead to memory corruption. So, a subsequent change to pci_dev_reset_iommu_done() will keep such a failed device blocked instead of recovering its IOMMU pathway. Several quirk functions in the pci_dev_reset_methods array call pcie_flr() but discard its return value and unconditionally report success, hiding a failed reset from __pci_reset_function_locked(). Return the value instead. Nothing is short-circuited on failure: each quirk still runs its restore or settle steps as before, and reset_hinic_vf_dev() also reports its firmware FLR-completion timeout, keeping an earlier pcie_flr() error if any. Note that a kept pcie_flr() error does not misreport a normal reset: as per the erratum in commit 411e2a43d210e ("PCI: Work around Huawei Intelligent NIC VF FLR erratum"), the VF responds to config reads before its firmware completes the reset processing, so pci_dev_wait() returns promptly instead of timing out. However, pcie_flr() reports a device that did not come back after the FLR as -ENOTTY, and __pci_reset_function_locked() takes any -ENOTTY as "try the next method". Since these quirks have always returned success, escalating would be a new and harmful behavior: the next method is typically the plain "flr" method, which would re-run the same FLR without the extra steps the quirk wraps around its pcie_flr() call. Add quirk_flr_err() converting that -ENOTTY to -ETIMEDOUT, so the cascade still stops at the quirk as before. The early "not applicable" -ENOTTY returns are left intact, and they still ask the caller to try the next method. Convert it at the quirk level rather than in pcie_flr() or pci_dev_wait(), because those also serve the native "flr"/"af_flr"/"pm" methods, where the -ENOTTY on timeout is deliberate per commit 91295d79d658 ("PCI: Handle FLR failure and allow other reset types"): a timed-out native FLR escalates to a stronger reset (e.g. bus reset), which skips no workaround there and may recover the device. Converting in the core would also change the value seen by every direct pcie_flr() caller. This is not a bug fix, since these functions have always returned success and the propagated values are only consumed by incoming work. Suggested-by: Kevin Tian Assisted-by: Claude:claude-fable-5 Signed-off-by: Nicolin Chen --- drivers/pci/quirks.c | 43 ++++++++++++++++++++++++++++++------------- 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 8ecd1bc561d28..7f6d1574fe2bf 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3934,6 +3934,18 @@ DECLARE_PCI_FIXUP_SUSPEND_LATE(PCI_VENDOR_ID_INTEL, * reset a single function if other methods (e.g. FLR, PM D0->D3) are * not available. */ + +/* + * pcie_flr() reports a device that did not come back after the FLR as -ENOTTY. + * The caller __pci_reset_function_locked() takes that as "try the next method" + * and ignores the error, which is wrong for the quirk functions below. Return + * -ETIMEDOUT instead. + */ +static int quirk_flr_err(int err) +{ + return err == -ENOTTY ? -ETIMEDOUT : err; +} + static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, bool probe) { /* @@ -3945,7 +3957,7 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, bool probe) * supported. */ if (!probe) - pcie_flr(dev); + return quirk_flr_err(pcie_flr(dev)); return 0; } @@ -4003,6 +4015,7 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, bool probe) { u16 old_command; u16 msix_flags; + int ret; /* * If this isn't a Chelsio T4-based device, return -ENOTTY indicating @@ -4048,16 +4061,15 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, bool probe) PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - pcie_flr(dev); + ret = quirk_flr_err(pcie_flr(dev)); /* * Restore the configuration information (BAR values, etc.) including - * the original PCI Configuration Space Command word, and return - * success. + * the original PCI Configuration Space Command word. */ pci_restore_state(dev); pci_write_config_word(dev, PCI_COMMAND, old_command); - return 0; + return ret; } #define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed @@ -4140,9 +4152,7 @@ static int nvme_disable_and_flr(struct pci_dev *dev, bool probe) pci_iounmap(dev, bar); - pcie_flr(dev); - - return 0; + return quirk_flr_err(pcie_flr(dev)); } /* @@ -4154,14 +4164,17 @@ static int nvme_disable_and_flr(struct pci_dev *dev, bool probe) */ static int delay_250ms_after_flr(struct pci_dev *dev, bool probe) { + int ret; + if (probe) return pcie_reset_flr(dev, PCI_RESET_PROBE); - pcie_reset_flr(dev, PCI_RESET_DO_RESET); + ret = quirk_flr_err(pcie_reset_flr(dev, PCI_RESET_DO_RESET)); + /* Settle the device even on a failed FLR */ msleep(250); - return 0; + return ret; } #define PCI_DEVICE_ID_HINIC_VF 0x375E @@ -4177,6 +4190,7 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe) unsigned long timeout; void __iomem *bar; u32 val; + int ret; if (probe) return 0; @@ -4197,12 +4211,13 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe) val = val | HINIC_VF_FLR_PROC_BIT; iowrite32be(val, bar + HINIC_VF_OP); - pcie_flr(pdev); + ret = quirk_flr_err(pcie_flr(pdev)); /* * The device must recapture its Bus and Device Numbers after FLR * in order generate Completions. Issue a config write to let the - * device capture this information. + * device capture this information. Note that pcie_flr() can fail + * after the reset is asserted. So, recapture it unconditionally. */ pci_write_config_word(pdev, PCI_VENDOR_ID, 0); @@ -4220,11 +4235,13 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe) goto reset_complete; pci_warn(pdev, "Reset dev timeout, FLR ack reg: %#010x\n", val); + /* Preserve pcie_flr()'s error if it failed before the device ack stage */ + ret = ret ? : -ETIMEDOUT; reset_complete: pci_iounmap(pdev, bar); - return 0; + return ret; } static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { -- 2.43.0