From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDA491798A; Sat, 16 Dec 2023 13:26:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="U6JKP7NJ" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 3BGCwnrd012660; Sat, 16 Dec 2023 13:26:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= message-id:date:mime-version:subject:to:cc:references:from :in-reply-to:content-type:content-transfer-encoding; s= qcppdkim1; bh=bKynHJWGr7ONAz8unpVeqEBnAd5NDlRFfmjDUgTUwJE=; b=U6 JKP7NJjx8ckYuJxc1SrA+hbk6U2iZ3NCHXMi2ARdsQFgj6TLCRZVj5DMrocXcsw1 xgkYViIVGsn+I5m9jGH72JiEaIN8GUnR7ToaKyawbmX+HDRobi40p0MOgD7Pmnau XilYBD4GAiMXQTlH53xSCmaLGBGFMhUoFTh8eQgx+IVveInz0EteX4rSzlwV3/m7 jiI2XUhZDAYXZOQftZnakbeOknHyrHvj6e7ktlRPCGgcDN5aQV57GgyZeS6hy3rV PTl8olttwLayqngNVSEwdcV09KtH3NRd1ASVUtmVtt734hT2ZasTH/aEliEmWPLl FE9lxuDbNjiIEqah1hVA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3v14vj8mcb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 16 Dec 2023 13:26:05 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3BGDQ4kG030722 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 16 Dec 2023 13:26:04 GMT Received: from [10.253.9.247] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sat, 16 Dec 2023 05:26:00 -0800 Message-ID: Date: Sat, 16 Dec 2023 21:25:57 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 14/14] dt-bindings: net: ar803x: add qca8084 PHY properties Content-Language: en-US To: Andrew Lunn CC: , , , , , , , , , , , , , , , , Christian Marangi References: <20231215074005.26976-1-quic_luoj@quicinc.com> <20231215074005.26976-15-quic_luoj@quicinc.com> <60b9081c-76fa-4122-b7ae-5c3dcf7229f9@lunn.ch> <7c05b08a-bb6d-4fa1-8cee-c1051badc9d9@lunn.ch> From: Jie Luo In-Reply-To: <7c05b08a-bb6d-4fa1-8cee-c1051badc9d9@lunn.ch> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Ft3wACUMi1EDWWRqOH5MtATbJQGxTlqu X-Proofpoint-GUID: Ft3wACUMi1EDWWRqOH5MtATbJQGxTlqu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 bulkscore=0 adultscore=0 phishscore=0 malwarescore=0 mlxscore=0 suspectscore=0 mlxlogscore=648 lowpriorityscore=0 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312160104 On 12/16/2023 6:21 PM, Andrew Lunn wrote: >> The following is the chip package, the chip can work on the switch mode >> like the existed upstream code qca8k, where PHY1-PHY4 is connected with >> MAC1-MAC4 directly; > > Ah, that is new information, and has a big effect on the design. > > Can the qca8K driver be extended to drive this hardware in switch > mode? > > Andrew Yes, Andrew, the qca8k driver can be extended to drive this hardware in the switch mode, we will push it to the upstream in the near future.