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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ace6ed71ff2sm196207266b.144.2025.04.25.14.56.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 25 Apr 2025 14:56:13 -0700 (PDT) Message-ID: Date: Fri, 25 Apr 2025 23:56:11 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm64: dts: qcom: sm8550: add iris DT node To: neil.armstrong@linaro.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dikshita Agarwal References: <20250424-topic-sm8x50-upstream-iris-8550-dt-v3-1-92f6b692bd52@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250424-topic-sm8x50-upstream-iris-8550-dt-v3-1-92f6b692bd52@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: mebaCQJJvEacmdZfxXTmiL1C5uSoisNG X-Authority-Analysis: v=2.4 cv=ftfcZE4f c=1 sm=1 tr=0 ts=680c04ff cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=KKAkSRfTAAAA:8 a=COk6AnOGAAAA:8 a=wn_BznkOyV8vFZdaYPEA:9 a=pfqro4Q_cSz128hX:21 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: mebaCQJJvEacmdZfxXTmiL1C5uSoisNG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI1MDE1NyBTYWx0ZWRfXyGlDRB2WpKA4 FELtxO9EU5KKMHBZ8AoCFBoBIrJJLk4ZwQ6x+j3AkY54GKxv4h7ZhyckTSzqTr6otq5sRkhfRx+ bQhYy/UpeyR05kDA517CpS4LCl7irFLqVxVJxmRQjO636qM7e7ssAHKMK5IGJL2qqsxRP5md5MO ZKtyICHnKHJgDBt5cBcj0eyGUtofkZE28VuNxn/xNTQUmu1jnKZlktPGZgdDdghHzUxLItGHe7o FdNi+5mV+OuwvRlJ741VAifxOwk408x4mgfAC2mMXPPdzt+RI6LWjaD1i8kk7J/yyMMlOkw28Ut QznALgQFtNfpEq/SX2Wibag+KWN8SdyOJlU9BqMYWzL3NkLzor/Hzg5mpEwN/paqRNAWDEMgoFq WaVLGd1I/7lUOd5GpwNKkjPkoR4edmCAsXo50+58+cc+Vu2uG+DDVh+CEr2ezSf6NGTHZSTq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-25_07,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 lowpriorityscore=0 phishscore=0 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504250157 On 4/24/25 6:34 PM, neil.armstrong@linaro.org wrote: > From: Dikshita Agarwal > > Add DT entries for the sm8550 iris decoder. > > Since the firmware is required to be signed, only enable > on Qualcomm development boards where the firmware is > publicly distributed. > > Signed-off-by: Dikshita Agarwal > Signed-off-by: Neil Armstrong > --- [...] > + iris: video-codec@aa00000 { > + compatible = "qcom,sm8550-iris"; > + > + reg = <0 0x0aa00000 0 0xf0000>; > + interrupts = ; > + > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, > + <&videocc VIDEO_CC_MVS0_GDSC>, > + <&rpmhpd RPMHPD_MXC>, > + <&rpmhpd RPMHPD_MMCX>; > + power-domain-names = "venus", "vcodec0", "mxc", "mmcx"; Please turn this and clock-names intro vertical lists > + operating-points-v2 = <&iris_opp_table>; > + > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, > + <&videocc VIDEO_CC_MVS0C_CLK>, > + <&videocc VIDEO_CC_MVS0_CLK>; > + clock-names = "iface", "core", "vcodec0_core"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "cpu-cfg", "video-mem"; > + > + /* FW load region */ Not very useful > + memory-region = <&video_mem>; > + > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; > + reset-names = "bus"; > + > + iommus = <&apps_smmu 0x1940 0x0000>, One zero does the job > + <&apps_smmu 0x1947 0x0000>; similarly, 0x1942 0x0 may come in useful too > + dma-coherent; > + > + /* > + * IRIS firmware is signed by vendors, only > + * enable in boards where the proper signed firmware > + * is available. > + */ See 8650 patch comment > + status = "disabled"; > + > + iris_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-240000000 { > + opp-hz = /bits/ 64 <240000000>; > + required-opps = <&rpmhpd_opp_svs>, > + <&rpmhpd_opp_low_svs>; > + }; > + > + opp-338000000 { > + opp-hz = /bits/ 64 <338000000>; > + required-opps = <&rpmhpd_opp_svs>, > + <&rpmhpd_opp_svs>; > + }; > + > + opp-366000000 { > + opp-hz = /bits/ 64 <366000000>; > + required-opps = <&rpmhpd_opp_svs_l1>, > + <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-444000000 { > + opp-hz = /bits/ 64 <444000000>; > + required-opps = <&rpmhpd_opp_turbo>, > + <&rpmhpd_opp_turbo>; nom (nom nom nom) > + }; > + > + opp-533333334 { > + opp-hz = /bits/ 64 <533333334>; > + required-opps = <&rpmhpd_opp_turbo_l1>, > + <&rpmhpd_opp_turbo_l1>; turbo Konrad