From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D3A036F8F9 for ; Tue, 7 Jul 2026 14:58:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783436321; cv=none; b=E6lwYeN7/PUq+cW2oXiGOKum8tnNojlkLalGT+IAZ8zkHPfRb3Lx0c9szSNm1Cl6Bk4r+SeztaXwRXHil6WyxuFeUz+8QwJRZYUd+4atDjC+LWxWPd7NagYcDjwJJNLacYjSoy5rZetaBrlHnH0IxZI9w+7ZTne+MFdHcYKSof0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783436321; c=relaxed/simple; bh=arvLCYHqWrUHkcx055c37FRvAlzSr7XgCPww+FFNsX8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=cyWx9ujMslDo3rLIq4eFdRnq1cM2cvX/CavBrsFsncYmQpC4lphyeiOwPCMH31QlxrC3zeisBh5dQbmYc2s3vF2DSrGhaTQXceKeuhmWiDw3QEu/kCVaR8Q5W4JTueaPo8Pl6wGoq75mPrWE87+/m3on67iEjMdYdb07xDajtRs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dfI6HzF2; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dfI6HzF2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62EA51F000E9; Tue, 7 Jul 2026 14:58:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783436319; bh=y3xVuote9u3D9BR80HWLFb2zecWYnRZ4sk5LiXRI0YI=; h=From:To:Cc:Subject:Date; b=dfI6HzF2IKlnSnYCYlYGAX1Mru9WuhG2EKUEyWYloiQK+VfDtqXBF6He7SzogTlLx ZBktpeiXk1r6/JryEblxF7Wwh4Utc6dK0PNfFclIpTNJM6Hn1rC2MzybW0uY9NrbbE xUoogzzHKP+WmFiG7CmsxYu+Liyk01MLLDRW3COJ/31eeX+AlPVkG7fFAaInpqZpV7 9ThfyhbZitkME77THpop1+9tgd3r8wMBeo6vXigfwGT9Aly8dPSyj7P8b3huzzQ2Tm 7qSpK52ShNMdp6RK1T1FniJQJtGmm+GxJuUfXC3pnwpvzf3LV+tz2ARBMyZ8+2Al2Q 1YBxhu2bMT4nQ== From: "Christophe Leroy (CS GROUP)" To: Qiang Zhao , Madhavan Srinivasan , "Christophe Leroy (CS GROUP)" Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, Paul Louvel Subject: [PATCH 1/2] soc: fsl: qe_ports_ic: Use generic I/O helper instead of specific powerPC ones Date: Tue, 7 Jul 2026 16:58:14 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2349; i=chleroy@kernel.org; h=from:subject:message-id; bh=arvLCYHqWrUHkcx055c37FRvAlzSr7XgCPww+FFNsX8=; b=kA0DAAoW3ZBwJryrz1MByyZiAGpNFAqhsGEuFtzI08+Th4P43Q0RY7aAxNfenMFmxeCOlYxFW oh1BAAWCgAdFiEEx/8LupiK9GVvlbov3ZBwJryrz1MFAmpNFAoACgkQ3ZBwJryrz1OaEAD/ZJLU jrGNaBWQSyj2qj4rPDOldJT+4j0T2Xya5+hWbGQA/0W1CqRSxmOPzQdin2BYVlmkdXFpiaXkTEx l5dP6JYsA X-Developer-Key: i=chleroy@kernel.org; a=openpgp; fpr=10FFE6F8B390DE17ACC2632368A92FEB01B8DD78 Content-Transfer-Encoding: 8bit Use ioread32be() and iowrite32be() instead of in_be32() and out_be32() to allow build on other platforms than powerPC. Signed-off-by: Christophe Leroy (CS GROUP) --- drivers/soc/fsl/qe/qe_ports_ic.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c index 9b0bba64e91e4..33ca1ddafe18c 100644 --- a/drivers/soc/fsl/qe/qe_ports_ic.c +++ b/drivers/soc/fsl/qe/qe_ports_ic.c @@ -23,36 +23,39 @@ struct qepic_data { static void qepic_mask(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); + u32 val = ioread32be(data->reg + CEPIMR); - clrbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(val & ~(1 << (31 - irqd_to_hwirq(d))), data->reg + CEPIMR); } static void qepic_unmask(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); + u32 val = ioread32be(data->reg + CEPIMR); - setbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(val | 1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIMR); } static void qepic_end(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); - out_be32(data->reg + CEPIER, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIER); } static int qepic_set_type(struct irq_data *d, unsigned int flow_type) { struct qepic_data *data = irq_data_get_irq_chip_data(d); unsigned int vec = (unsigned int)irqd_to_hwirq(d); + u32 val = ioread32be(data->reg + CEPICR); switch (flow_type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_EDGE_FALLING: - setbits32(data->reg + CEPICR, 1 << (31 - vec)); + iowrite32be(val | 1 << (31 - vec), data->reg + CEPICR); return 0; case IRQ_TYPE_EDGE_BOTH: case IRQ_TYPE_NONE: - clrbits32(data->reg + CEPICR, 1 << (31 - vec)); + iowrite32be(val & ~(1 << (31 - vec)), data->reg + CEPICR); return 0; } return -EINVAL; @@ -69,7 +72,7 @@ static struct irq_chip qepic = { static int qepic_get_irq(struct irq_desc *desc) { struct qepic_data *data = irq_desc_get_handler_data(desc); - u32 event = in_be32(data->reg + CEPIER); + u32 event = ioread32be(data->reg + CEPIER); if (!event) return -1; -- 2.54.0