Re: [PATCH net-next v7 8/8] mfd: zl3073x: Register DPLL sub-device during init

[Ivan Vecera <ivecera@redhat.com>]

On 07. 05. 25 5:26 odp., Lee Jones wrote:
> On Wed, 07 May 2025, Andy Shevchenko wrote:
> 
>> On Wed, May 07, 2025 at 03:56:37PM +0200, Ivan Vecera wrote:
>>> On 07. 05. 25 3:41 odp., Andy Shevchenko wrote:
>>>> On Wed, May 7, 2025 at 3:45 PM Ivan Vecera <ivecera@redhat.com> wrote:
>>
>> ...
>>
>>>>> +static const struct zl3073x_pdata zl3073x_pdata[ZL3073X_MAX_CHANNELS] = {
>>>>> +       { .channel = 0, },
>>>>> +       { .channel = 1, },
>>>>> +       { .channel = 2, },
>>>>> +       { .channel = 3, },
>>>>> +       { .channel = 4, },
>>>>> +};
>>>>
>>>>> +static const struct mfd_cell zl3073x_devs[] = {
>>>>> +       ZL3073X_CELL("zl3073x-dpll", 0),
>>>>> +       ZL3073X_CELL("zl3073x-dpll", 1),
>>>>> +       ZL3073X_CELL("zl3073x-dpll", 2),
>>>>> +       ZL3073X_CELL("zl3073x-dpll", 3),
>>>>> +       ZL3073X_CELL("zl3073x-dpll", 4),
>>>>> +};
>>>>
>>>>> +#define ZL3073X_MAX_CHANNELS   5
>>>>
>>>> Btw, wouldn't be better to keep the above lists synchronised like
>>>>
>>>> 1. Make ZL3073X_CELL() to use indexed variant
>>>>
>>>> [idx] = ...
>>>>
>>>> 2. Define the channel numbers
>>>>
>>>> and use them in both data structures.
>>>>
>>>> ...
>>>
>>> WDYM?
>>>
>>>> OTOH, I'm not sure why we even need this. If this is going to be
>>>> sequential, can't we make a core to decide which cell will be given
>>>> which id?
>>>
>>> Just a note that after introduction of PHC sub-driver the array will look
>>> like:
>>> static const struct mfd_cell zl3073x_devs[] = {
>>>         ZL3073X_CELL("zl3073x-dpll", 0),  // DPLL sub-dev for chan 0
>>>         ZL3073X_CELL("zl3073x-phc", 0),   // PHC sub-dev for chan 0
>>>         ZL3073X_CELL("zl3073x-dpll", 1),  // ...
>>>         ZL3073X_CELL("zl3073x-phc", 1),
>>>         ZL3073X_CELL("zl3073x-dpll", 2),
>>>         ZL3073X_CELL("zl3073x-phc", 2),
>>>         ZL3073X_CELL("zl3073x-dpll", 3),
>>>         ZL3073X_CELL("zl3073x-phc", 3),
>>>         ZL3073X_CELL("zl3073x-dpll", 4),
>>>         ZL3073X_CELL("zl3073x-phc", 4),   // PHC sub-dev for chan 4
>>> };
>>
>> Ah, this is very important piece. Then I mean only this kind of change
>>
>> enum {
>> 	// this or whatever meaningful names
>> 	..._CH_0	0
>> 	..._CH_1	1
>> 	...
>> };
>>
>> static const struct zl3073x_pdata zl3073x_pdata[ZL3073X_MAX_CHANNELS] = {
>>         { .channel = ..._CH_0, },
>>         ...
>> };
>>
>> static const struct mfd_cell zl3073x_devs[] = {
>>         ZL3073X_CELL("zl3073x-dpll", ..._CH_0),
>>         ZL3073X_CELL("zl3073x-phc", ..._CH_0),
>>         ...
>> };
> 
> This is getting hectic.  All for a sequential enumeration.  Seeing as
> there are no other differentiations, why not use IDA in the child
> instead?

For that, there have to be two IDAs, one for DPLLs and one for PHCs...
The approach in my second reply in this thread is simpler and taken
in v8.

<cite>
+#define ZL3073X_PDATA(_channel)			\
+	(&(const struct zl3073x_pdata) {	\
+		.channel = _channel,		\
+	})
+
+#define ZL3073X_CELL(_name, _channel)				\
+	MFD_CELL_BASIC(_name, NULL, ZL3073X_PDATA(_channel),	\
+		       sizeof(struct zl3073x_pdata), 0)
+
+static const struct mfd_cell zl3073x_devs[] = {
+	ZL3073X_CELL("zl3073x-dpll", 0),
+	ZL3073X_CELL("zl3073x-dpll", 1),
+	ZL3073X_CELL("zl3073x-dpll", 2),
+	ZL3073X_CELL("zl3073x-dpll", 3),
+	ZL3073X_CELL("zl3073x-dpll", 4),
+};
</cite>

Lee, WDYT?

Thanks,
Ivan