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Tue, 16 Jun 2026 06:43:49 -0700 (PDT) X-Received: by 2002:a05:622a:1a98:b0:50f:a53b:9d5 with SMTP id d75a77b69052e-517fdea8e41mr196168641cf.2.1781617428618; Tue, 16 Jun 2026 06:43:48 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-693c6d7cf3csm4133056a12.14.2026.06.16.06.43.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Jun 2026 06:43:47 -0700 (PDT) Message-ID: Date: Tue, 16 Jun 2026 15:43:44 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/10] ARM: dts: qcom: msm8960: add RPM clock controller and fix USB clocks To: Antony Kurniawan Soemardi , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Konrad Dybcio Cc: Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, Rudraksha Gupta References: <20260601-msm8960-wifi-v3-0-fec6ac8dba02@smankusors.com> <20260601-msm8960-wifi-v3-5-fec6ac8dba02@smankusors.com> <1d15a420-7360-429e-a451-ec1f012a0346@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE2MDE0MCBTYWx0ZWRfX+JU+TsYGs9Q3 9H0/T43hbXRj5SzLrTqZ4BZvdcNq0raxA+mwb8vWhFxoviVTKBU3ELuJy2ny0IEVfZiLVtPQOgd kC3ImnfmwoU1dpYPwuafGL3r/VmwI9uCNwiBiHvU0Am1GdYzoRCMB0+qX03RVAfKQYL4gD74Jd5 G4mwFuGYhEOLVDVe9PZp02bFNtkMYKf8uUkgiZn0eyoCetj4LrYA7uaeIQTR/dcoFThxZ9FR3N3 NIkCejYt0KrdXQbOqxZbVCz2FfY5eKhZF/zWY5RBJYQ767rbZOo4Faz2ige7cYiYaY/nrDuXkfh cflHc4tetDa6Ecg2CluWVBb+XZXyu6iA2otXHeYb15RvVHaViE7mxKYyDWKcuA0c1JV4jXZmqXQ lPQJUlo5rC8ksvwsBsZRFUe9Ybno7M/puvrv+yvkOZ61ORrbPHjaD8bcxsRkAb87LJZMtqtPJ0/ Y0HgZjZEv4SFYe3LHfA== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE2MDE0MCBTYWx0ZWRfX6x1o/7NA3CSr FN/4wwuespmFdrkuhK49gvY0H0Ur/thYjTPzSZpy8UQwn1WyVKVJH4Y+2VlayeStvOCgpQydUVf mabhat/C/cnh3RnRiUMIvJIabVd3n6U= X-Proofpoint-ORIG-GUID: -aIlI-zyrITsa5oPxCbyBS2hqexuqCFz X-Authority-Analysis: v=2.4 cv=dZawG3Xe c=1 sm=1 tr=0 ts=6a315316 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=wxLWbCv9AAAA:8 a=kVRP5i783O7quJDYENkA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=QJY96suAAestDpCc5Gi9:22 X-Proofpoint-GUID: -aIlI-zyrITsa5oPxCbyBS2hqexuqCFz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-16_03,2026-06-15_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606160140 On 6/16/26 3:04 PM, Antony Kurniawan Soemardi wrote: > On 6/9/2026 7:21 PM, Konrad Dybcio wrote: >> On 6/1/26 10:51 AM, Antony Kurniawan Soemardi via B4 Relay wrote: >>> From: Antony Kurniawan Soemardi >>> @@ -507,8 +519,12 @@ usb1: usb@12500000 { >>>               reg = <0x12500000 0x200>, >>>                     <0x12500200 0x200>; >>>               interrupts = ; >>> -            clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; >>> -            clock-names = "core", "iface"; >>> +            clocks = <&gcc USB_HS1_H_CLK>, >>> +                 <&rpmcc RPM_DAYTONA_FABRIC_CLK>, >>> +                 <&gcc USB_HS1_XCVR_CLK>; >>> +            clock-names = "iface", >>> +                      "core", >>> +                      "fs"; >> >> The bindings change you sent changes the expectations - "core" used >> to be the first clock. And I would guesstimate that the >> DAYTONA_FABRIC clock is not really "core" - does downstream do any >> ratesetting on the other two? > > Looking at the downstream, I can only find HS1_XCVR being set to 60MHz, DAYTONA_FABRIC being set to the max rate (just for voting purposes?). I don't see any clk_set_rate for HS1_P though. > > Would you rather the other way around? Like "core", "iface", and "fs"? My concern is that such a change would result in a large number of warnings for newer SoC device trees. I didn't notice you're actually aligning the order with bindings. I was under the impression this was a random change. For the clock assignments themselves, I think the schema reflects a full-speed (i.e. usb 1.x) core.. I dug out some ancient doc that says that we should have: - ahb (bus clock - perhaps daytona in this case?) - system (core clock for the thing, >55 Mhz for compliant HS operation or at least 35 MHz for any sort of operation) - ulpi_clk (60 MHz, coming from the USB PHY) (we can probably ignore this in our description) - inactivity_timer since there's a BAM instance attached to this host (possibly handled implicitly) for the record, there's 4 hosts: USB1_HS @ 0x12500000 (this one) USB2_HSIC @ 0x12520000 USB1_FS @ 0x18000000 USB2_FS @ 0x18100000 I don't know if they are all exposed and functional though Konrad