From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B637A32ABCD for ; Wed, 1 Apr 2026 06:49:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775026167; cv=none; b=W/OHwk2+0yrtUQVr2kRFRMqupq1MO7O6eaV8TR4AcjhwEsCfR/SRm9MpL1plLtIvUHK1w6UmMGSScgk4AmZ8Snc2iZUxb73+JQqwiXQGgR6mpK2yMCnOrnWOp0K3Dd5SKBDPaLu/wM9PbRJgFW97GhZpxXnKt6ohpL/lsjRcuLc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775026167; c=relaxed/simple; bh=QCxtr81m0smkx7MtgRUGEJbDJGOsru0lsnaJDTtqgzc=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=u68GfU0FTqBMQjpht0y0czsxkccVJMveidcsFEllkTu41g+SOUI1LZJe3ZTh++lY0nkZI8WnlBEnptHzjvkJf8FE0xOgtMDPz0+Cuk2vlxajHeVTCq6RKVIVgS5veTAZEoPuELrg3dtIkWZ10MxAvFtAybVE5cE/Y4AspMF4WRY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=OGSgGsSa; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=RGNzBVle; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="OGSgGsSa"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="RGNzBVle" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6312Iruu1004266 for ; Wed, 1 Apr 2026 06:49:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= kaSZtLO1O6dHgdsj6HMqLMbEQ2wzIJZCOsaKSTu39v4=; b=OGSgGsSa9xKJAaOw eiGzLuUwYlHDPFurD2a5lT9AO5s54lv48gc+p0ws41/EQ868kUA1Y/I7RLjRvmlu WETWfxzzVmLo6w0u9zpUH1sfyJJN0g4iNSVcEdraJTZR9Xk4cdegViB9r+LcMmac FHj4Bc+WPKm0cjT/CjTeXYEXHwDV9/BwR3hXa5uz2x7DgSsotWrQhS5IPZhY9r6J yhraGtVek0HnC/Upb8cL0cfrzAfmeaPZXtgXZ04TACCgo0jZlUYKzLrfSD4oVLBP EyEK1DC0Y36YHrn/h6pRVCi3Ih7GmEVItr8j/j3p+vke8PkGfqkmOVkv4wjS/6QF FNSMgA== Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d8tfjgxe4-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 01 Apr 2026 06:49:25 +0000 (GMT) Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-50b2cbe7223so212435351cf.2 for ; Tue, 31 Mar 2026 23:49:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1775026165; x=1775630965; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=kaSZtLO1O6dHgdsj6HMqLMbEQ2wzIJZCOsaKSTu39v4=; b=RGNzBVle1TNrwPZ/XbPCbqHEM3w+SZIfWLzQv9H0RvGe9tfF/8taQYF/XEmaggsZJk M2qmiNG86jl7CUtDZJwvK/YtLHLEmFNHWQjaj0R/7/fQq52OUsGB4ZFR6v0oVhEOLjIz I3MMEH/3BNVRr/nSqpInC6Um/kJvXH716TtkYwJ0Rw2J8gYLTEvEAL5yY9Iqw9WtV/1w yevsXH03VdAPJntrB2yUeGFfBcdoPAvvv7WHkptUY4GrtV7JSHqlL6zel8yEsH/eK5Ih xRwLm91taSkIb9pL0bFNVVPwGn0NqYKYCG4yBgi26idMSqTBPff0KNUOtXMUybC0VUEm zbxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775026165; x=1775630965; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=kaSZtLO1O6dHgdsj6HMqLMbEQ2wzIJZCOsaKSTu39v4=; b=ltQs6xbx7omeqRgBvTqjtgXswpmYsL4mNIsZt7CA7DdDn6Y0d9Qde/2vvJFLLU2/dE fQqVOnUxFxto686irev9yTmzU0AtJGmD51U/CA9LgjsFmnPQeHH4+dFvyPqMYRD6om// 5YPuQop8IbGpyqrpXDoOxu4JtC7m6QF96GDY9o0RYDR2Hk9ArLWwDRtUKb2InF7stKDB tThJsptaZsgRkRlTn3x3EbvyJ3XJMJbq4G31jdzmz403l/gk+C6hSjNib3nrR4ZEwTsZ BcsucyQdQfDSsnRZuXdm5IwJkdCZtXY6wp4Az4Xb+1tVmIk+nCbIHcOyLgSsK3NMe4cn SgYA== X-Forwarded-Encrypted: i=1; AJvYcCUPjRyTeeH411+zAR09da5+iWVIuC4Hm6MkfMEGCHesvqKF4l4IeEtLW1GTiEF0gQAoqvIploof21Kq5e4=@vger.kernel.org X-Gm-Message-State: AOJu0YxqYnh2ByM1BT+q3EFoH4+PoYs6bw1gm9SR3u/cQVUM+fsLJlfb mvO+l9maPuGuT3jSecbXrY0pxRaLnEi2C/wIJWNxZbV9tR+zQSRdC3UIppwHfn5IX8Hn90AFdNm rWvX6j550xnEdDqW+zTPiyuwtHYXJ3aZ6cLjFZV/ndbMCIYIo8KgNqo2Q00Ncxxw4pI4= X-Gm-Gg: ATEYQzysvSFza1ivSRwp+BNwoJe3/2Erfv6sKrHqjbms9oSjY8JFQCg91vVdw2RkQYq neRLesiHSD63lmjAr6vflQmoTle7/tL4k97en98iZTGpHubMXl4xEojVSdnQu6RifEVB9ssPkYt f6VniVA8ikJL/8/B5zjbfCe6wMBsn+lScwzsC2OQiAEDmCUB5oqMYXLsuOuWfeFh8yM9qQVALHa z8Tcl+b4jnHgovBqrOZZrt/w0lkWdAQd96RzbKZyWbMeutnBI2MZ0HT0QAQof7S5FRZP6EkMUzQ CQvfsVG1bFFSlYW+Gj1du3+IXHMVCfRCq6hIq+S7Fd+F8bhMOPegWOgOL1at2UuHRte+70ty7k5 whprTfeyi7Hr6MWA7BMIIJ8BwBeWdCB5HN9Dui0flhneXOQMSidV94vjp0sCLFXzOfALlyEfMnU /t5CSuvA9qCF9sdQo8tzzpLd5v X-Received: by 2002:a05:622a:488a:b0:50b:50f5:b8e0 with SMTP id d75a77b69052e-50d3bc3dfffmr36132051cf.28.1775026165031; Tue, 31 Mar 2026 23:49:25 -0700 (PDT) X-Received: by 2002:a05:622a:488a:b0:50b:50f5:b8e0 with SMTP id d75a77b69052e-50d3bc3dfffmr36131801cf.28.1775026164639; Tue, 31 Mar 2026 23:49:24 -0700 (PDT) Received: from ?IPV6:2001:14ba:a073:af00::4c9? (2001-14ba-a073-af00--4c9.rev.dnainternet.fi. [2001:14ba:a073:af00::4c9]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a2b1403cb6sm3076261e87.27.2026.03.31.23.49.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Mar 2026 23:49:23 -0700 (PDT) Message-ID: Date: Wed, 1 Apr 2026 09:49:20 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 18/38] drm/msm/dp: Add support to enable MST in mainlink control To: Yongxing Mou Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar References: <20250825-msm-dp-mst-v3-0-01faacfcdedd@oss.qualcomm.com> <20250825-msm-dp-mst-v3-18-01faacfcdedd@oss.qualcomm.com> <49dae108-ad9d-4931-a10e-810de5766790@oss.qualcomm.com> Content-Language: en-US From: Dmitry Baryshkov In-Reply-To: <49dae108-ad9d-4931-a10e-810de5766790@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: oo14hIGZxxYMtlVDJUNpjN8ln_Rn1K9V X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDA1OCBTYWx0ZWRfX3TNOa9ho+6j7 ingOJ/1X7L1G0gmtCe3ysZliKhZ2ygXeKeJh0VcidFI2XCzB+YpfbYXGwcRblwyz2xbZnR5CArh qRoB2mmbzzmWjXhznlOP1XRJAb9Oj21RbWZMy9+n8YQ/2xi4m/7GXR/fLfI36abkS4rvUFNck2j lNeuRAxcOwtZ4zzXDFkejQEyW9DMgAV4P6cpT7rhJDjlC0no84HV4UMXItM4KgWti9iKrP1K87a CcFaMKWj/MnRdViUJ28uqW02Wgne/VcmhYMJQNpxKc3uUw1zMCD9tYtiK2WQrVpEfpDE/sNMChm b9p9t1dvulnLxFd/Pu7hgr2T8sCcQU8j5Qe2uXDBbw7oI2sLd8CelOydTD8tuCjroAAed3cmVPK Y0HLRxGgAFdeVo2GsrJpGmD+3nkHyVkBXebhbOc79EKQtdLbci57r+5tKA6GIfGuj6WVDtBy0gz bSVbTHzj7I2rM+K8mTg== X-Authority-Analysis: v=2.4 cv=fJc0HJae c=1 sm=1 tr=0 ts=69ccbff6 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=lP0j4_6gZTFRyBZCz58A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: oo14hIGZxxYMtlVDJUNpjN8ln_Rn1K9V X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_02,2026-03-31_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 spamscore=0 clxscore=1015 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010058 On 01/04/2026 09:46, Yongxing Mou wrote: > > > On 8/26/2025 5:24 AM, Dmitry Baryshkov wrote: >> On Mon, Aug 25, 2025 at 10:16:04PM +0800, Yongxing Mou wrote: >>> From: Abhinav Kumar >>> >>> Add support to program the MST enable bit in the mainlink control >>> register when an MST session is active or being disabled. >>> >>> Signed-off-by: Abhinav Kumar >>> Signed-off-by: Yongxing Mou >>> --- >>>   drivers/gpu/drm/msm/dp/dp_ctrl.c | 17 +++++++++++++++++ >>>   drivers/gpu/drm/msm/dp/dp_reg.h  |  1 + >>>   2 files changed, 18 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/ >>> dp/dp_reg.h >>> index >>> de3d0b8b52c269fd7575edf3f4096a4284ad0b8d..fda847b33f8d0d6ec4d2589586b5a3d6c9b1ccf3 100644 >>> --- a/drivers/gpu/drm/msm/dp/dp_reg.h >>> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h >>> @@ -128,6 +128,7 @@ >>>   #define DP_MAINLINK_FLUSH_MODE_UPDATE_SDP >>> FIELD_PREP(DP_MAINLINK_CTRL_FLUSH_MODE_MASK, 1) >>>   #define DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE >>> FIELD_PREP(DP_MAINLINK_CTRL_FLUSH_MODE_MASK, 3) >>>   #define DP_MAINLINK_FB_BOUNDARY_SEL        (0x02000000) >>> +#define DP_MAINLINK_CTRL_MST_EN            (0x04000100) >> >> Why are there two bits? >> > Bit 8 enables MST, and bit 26 was set to select the required ECF > endianness. > > 27:26    ECF_MODE        MST ECF Endianness > >                                   0x0: [63:56], [55:48], ... [7:0] > >                                   0x1: [7:0], [15:8], ... [63:56] > >                                   0x2: [56:63], [48:55], ... [0:7] > >                                   0x3: [0:7], [8:15], ... [56:63] > > 8    MST_EN        Multi Stream Enable You can guess, #define them separately (and the ECF should be the GENMASK). >>>   #define REG_DP_STATE_CTRL            (0x00000004) >>>   #define DP_STATE_CTRL_LINK_TRAINING_PATTERN1    (0x00000001) >>> >>> -- >>> 2.34.1 >>> >> > -- With best wishes Dmitry