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([2a01:e0a:982:cbb0:52fb:80bd:bee3:f741]) by smtp.gmail.com with ESMTPSA id c11-20020a5d63cb000000b003062cdc6ac5sm11554084wrw.89.2023.05.04.05.55.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 May 2023 05:55:20 -0700 (PDT) Message-ID: Date: Thu, 4 May 2023 14:55:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH 3/6] arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graph Content-Language: en-US To: Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> <20230503-topic-sm8450-graphics-dp-next-v1-3-d1ee9397f2a6@linaro.org> Organization: Linaro Developer Services In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/05/2023 08:53, Konrad Dybcio wrote: > > > On 3.05.2023 15:10, Neil Armstrong wrote: >> With support for the QMP combo phy to react to USB Type-C switch events, >> introduce it as the next hop for the SuperSpeed lanes of the Type-C >> connector, and connect the output of the DisplayPort controller >> to the QMP combo phy. >> >> This allows the TCPM to perform orientation switching of both USB and >> DisplayPort signals. >> >> Signed-off-by: Neil Armstrong >> --- >> arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 74 ++++++++++++++++++++++++++++++++- >> 1 file changed, 72 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts >> index 2ee1b121686a..fa835bdb7408 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts >> +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts >> @@ -58,7 +58,15 @@ port@1 { >> reg = <1>; >> >> pmic_glink_ss_in: endpoint { >> - remote-endpoint = <&usb_1_dwc3_ss>; >> + remote-endpoint = <&usb_1_qmpphy_out>; >> + }; >> + }; >> + >> + port@2 { >> + reg = <2>; >> + >> + pmic_glink_sbu: endpoint { >> + remote-endpoint = <&fsa4480_sbu_mux>; >> }; >> }; >> }; >> @@ -326,6 +334,36 @@ zap-shader { >> }; >> }; >> >> +&i2c13 { >> + status = "okay"; >> + clock-frequency = <100000>; > Status last Ack > >> + >> + fsa4480@42 { >> + compatible = "fcs,fsa4480"; >> + reg = <0x42>; >> + >> + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; >> + >> + vcc-supply = <&vreg_bob>; >> + mode-switch; >> + orientation-switch; >> + svid = /bits/ 16 <0xff01>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + >> + fsa4480_sbu_mux: endpoint { >> + remote-endpoint = <&pmic_glink_sbu>; >> + }; >> + }; >> + }; >> + }; >> +}; >> + >> &i2c15 { >> clock-frequency = <400000>; >> status = "okay"; >> @@ -370,6 +408,20 @@ &mdss { >> status = "okay"; >> }; >> >> +&mdss_dp { >> + status = "okay"; >> + >> + ports { >> + port@1 { >> + reg = <1>; > missing newline > >> + mdss_dp0_out: endpoint { >> + data-lanes = <0 1>; >> + remote-endpoint = <&usb_1_qmpphy_dp_in>; >> + }; >> + }; >> + }; >> +}; >> + >> &mdss_mdp { >> status = "okay"; >> }; >> @@ -416,6 +468,10 @@ &qupv3_id_0 { >> status = "okay"; >> }; >> >> +&qupv3_id_1 { >> + status = "okay"; >> +}; >> + >> &qupv3_id_2 { >> status = "okay"; >> }; >> @@ -716,7 +772,7 @@ &usb_1_dwc3_hs { >> }; >> >> &usb_1_dwc3_ss { >> - remote-endpoint = <&pmic_glink_ss_in>; >> + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; >> }; >> >> &usb_1_hsphy { >> @@ -732,6 +788,20 @@ &usb_1_qmpphy { >> >> vdda-phy-supply = <&vreg_l6b_1p2>; >> vdda-pll-supply = <&vreg_l1b_0p88>; >> + >> + orientation-switch; > this is a common property which will/should be ignored if no > usbc is present So, do you mean it should be in the common dtsi ? I don't see why since it's only true if there's an USB-C connector > >> +}; >> + >> +&usb_1_qmpphy_out { >> + remote-endpoint = <&pmic_glink_ss_in>; >> +}; >> + >> +&usb_1_qmpphy_usb_ss_in { >> + remote-endpoint = <&usb_1_dwc3_ss>; >> +}; >> + >> +&usb_1_qmpphy_dp_in { >> + remote-endpoint = <&mdss_dp0_out>; > 'd' < 'o' < 'u' Exact... > > with that fixed > > Reviewed-by: Konrad Dybcio > > Konrad >> }; >> >> &usb_2 { >>